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AM3892 Datasheet(PDF) 69 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 69 Page - Texas Instruments |
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69 / 299 page  AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 3.2.9 Multichannel Buffered Serial Port Signals Table 3-12. McBSP Terminal Functions SIGNAL TYPE(1) OTHER(2) (3) MUXED DESCRIPTION NAME NO. MCA[2]_ACLKR/ PULL: IPD / IPD MCA[2], MCB MCB_CLKR/ AL34 I/O DRIVE: Z / Z PINCTRL148 MCB_DR DVDD_3P3 McBSP Receive Clock I/O PULL: IPD / IPD MCA[2]_AHCLKX/ MCA[2] AN36 I/O DRIVE: Z / Z MCB_CLKR PINCTRL152 DVDD_3P3 PULL: IPD / IPD MCA[0]_AXR[3]/ MCA[0] AJ34 I/O DRIVE: Z / Z MCB_FSR PINCTRL136 DVDD_3P3 McBSP Receive Frame Sync I/O MCA[2]_AFSR/ PULL: IPD / IPD MCA[2], MCB MCB_CLKX/ AM35 I/O DRIVE: Z / Z PINCTRL150 MCB_FSR DVDD_3P3 PULL: IPD / IPD MCA[0]_AXR[5]/ MCA[0] AJ37 I DRIVE: Z / Z MCB_DR PINCTRL138 DVDD_3P3 McBSP Receive Data Input MCA[2]_ACLKR/ PULL: IPD / IPD MCA[2], MCB MCB_CLKR/ AL34 I DRIVE: Z / Z PINCTRL148 MCB_DR DVDD_3P3 MCA[2]_AFSR/ PULL: IPD / IPD MCA[2], MCB MCB_CLKX/ AM35 I/O DRIVE: Z / Z PINCTRL150 MCB_FSR DVDD_3P3 McBSP Transmit Clock I/O PULL: IPD / IPD MCA[2]_ACLKX/ MCA[2] AM36 I/O DRIVE: Z / Z MCB_CLKX PINCTRL151 DVDD_3P3 PULL: IPD / IPD MCA[0]_AXR[2]/ MCA[0] AJ33 I/O DRIVE: Z / Z MCB_FSX PINCTRL135 DVDD_3P3 McBSP Transmit Frame Sync I/O MCA[2]_AFSX/ PULL: IPD / IPD MCA[2], MCB MCB_CLKS/ AN35 I/O DRIVE: Z / Z PINCTRL153 MCB_FSX DVDD_3P3 PULL: IPD / IPD MCA[0]_AXR[4]/ MCA[0] AJ36 O DRIVE: Z / Z MCB_DX PINCTRL137 DVDD_3P3 McBSP Transmit Data Output PULL: IPD / IPD MCA[2]_AXR[1]/ MCA[2] AR37 O DRIVE: Z / Z MCB_DX PINCTRL156 DVDD_3P3 PULL: IPD / IPD MCA[2]_AHCLKR/ MCA[2] AM34 I DRIVE: Z / Z MCB_CLKS PINCTRL149 DVDD_3P3 McBSP Source Clock Input MCA[2]_AFSX/ PULL: IPD / IPD MCA[2], MCB MCB_CLKS/ AN35 I DRIVE: Z / Z PINCTRL153 MCB_FSX DVDD_3P3 (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal. (2) PULL: A / B, where: A is the state of the internal pull resistor during POR reset B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled DRIVE: A / B, where; A is the driving state of the pin during POR reset B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset H = Driving High, L = Driving Low, Z = 3-State For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 4.2.1, Pullup/Pulldown Resistors. (3) Specifies the operating I/O supply voltage for each signal. Copyright © 2010–2011, Texas Instruments Incorporated Device Pins 69 Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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