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AM3892 Datasheet(PDF) 66 Page - Texas Instruments

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Part # AM3892
Description  AM389x Sitara ARM Microprocessors (MPUs)
PDF  299 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM3892 Datasheet(HTML) 66 Page - Texas Instruments

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AM3894
AM3892
SPRS681A – OCTOBER 2010 – REVISED MARCH 2011
www.ti.com
3.2.8
Multichannel Audio Serial Port Signals
Table 3-9. McASP0 Terminal Functions
SIGNAL
TYPE(1)
OTHER(2) (3)
MUXED
DESCRIPTION
NAME
NO.
PULL: IPD / IPD
-
MCA[0]_ACLKR
AK28
I/O
DRIVE: Z / Z
McASP0 Receive Bit Clock I/O
PINCTRL126
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_AHCLKR
AJ27
I/O
DRIVE: Z / Z
McASP0 Receive High-Frequency Master Clock I/O
PINCTRL127
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_AFSR
AG29
I/O
DRIVE: Z / Z
McASP0 Receive Frame Sync I/O
PINCTRL128
DVDD_3P3
PULL: IPD / IPD
GP0[7]/
GP0
H35
I/O
DRIVE: Z / Z
McASP0 Mute Input
MCA[0]_AMUTEIN
PINCTRL298
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_ACLKX
AH30
I/O
DRIVE: Z / Z
McASP0 Transmit Bit Clock I/O
PINCTRL129
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_AHCLKX
AH31
I/O
DRIVE: Z / Z
McASP0 Transmit High-Frequency Master Clock I/O
PINCTRL130
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_AFSX
AJ31
I/O
DRIVE: Z / Z
McASP0 Transmit Frame Sync I/O
PINCTRL131
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_AMUTE
AJ35
O
DRIVE: Z / Z
McASP0 Mute Output
PINCTRL132
DVDD_3P3
PULL: IPD / IPD
MCA[0]_AXR[5]/
MCB
AJ37
I/O
DRIVE: Z / Z
MCB_DR
PINCTRL138
DVDD_3P3
PULL: IPD / IPD
MCA[0]_AXR[4]/
MCB
AJ36
I/O
DRIVE: Z / Z
MCB_DX
PINCTRL137
DVDD_3P3
PULL: IPD / IPD
MCA[0]_AXR[3]/
MCB
AJ34
I/O
DRIVE: Z / Z
MCB_FSR
PINCTRL136
DVDD_3P3
McASP0 Transmit/Receive Data I/Os
PULL: IPD / IPD
MCA[0]_AXR[2]/
MCB
AJ33
I/O
DRIVE: Z / Z
MCB_FSX
PINCTRL135
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_AXR[1]
AJ32
I/O
DRIVE: Z / Z
PINCTRL134
DVDD_3P3
PULL: IPD / IPD
-
MCA[0]_AXR[0]
AK37
I/O
DRIVE: Z / Z
PINCTRL133
DVDD_3P3
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.
(2)
PULL: A / B, where:
A is the state of the internal pull resistor during POR reset
B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset
IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled
DRIVE: A / B, where;
A is the driving state of the pin during POR reset
B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset
H = Driving High, L = Driving Low, Z = 3-State
For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see
Section 4.2.1, Pullup/Pulldown Resistors.
(3)
Specifies the operating I/O supply voltage for each signal.
66
Device Pins
Copyright © 2010–2011, Texas Instruments Incorporated
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