AM3892 datasheet(82/299 Pages) TI

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AM3894

AM3892

SPRS681A – OCTOBER 2010 – REVISED MARCH 2011

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3.2.19 Video Input Signals

Table 3-24. Video Input 0 Terminal Functions

SIGNAL

TYPE(1)

OTHER(2) (3)

MUXED

DESCRIPTION

NAME

NO.

PULL: IPD / IPD

Video Input 0 Port A Clock input. Input clock for 8-bit,

VIN[0]A_CLK

AR14

DRIVE: Z / Z

PINCTRL83

16-bit, or 24-bit Port A video capture.

DVDD_3P3

PULL: IPD / IPD

Video Input 0 Port B Clock input. Input clock for 8-bit

VIN[0]B_CLK

AR19

DRIVE: Z / Z

Port B video capture. This signal is not used in 16-bit

PINCTRL84

DVDD_3P3

and 24-bit capture modes.

PULL: IPD / IPD

VIN[0]A_D[23]/

VIN[0]B

AT2

DRIVE: Z / Z

VIN[0]B_HSYNC

PINCTRL15

DVDD_3P3

PULL: IPD / IPD

VIN[0]A_D[22]/

VIN[0]B

AR2

DRIVE: Z / Z

VIN[0]B_VSYNC

PINCTRL14

DVDD_3P3

PULL: IPD / IPD

VIN[0]A_D[21]/

VIN[0]B

AU4

DRIVE: Z / Z

VIN[0]B_FLD

PINCTRL13

DVDD_3P3

PULL: IPD / IPD

Video Input 0 Port A Data inputs. For 16-bit capture,

VIN[0]A_D[20]/

VIN[0]B

AN3

DRIVE: Z / Z

D[7:0] are Cb/Cr and [15:8] are Y Port A inputs. For

VIN[0]B_DE

PINCTRL12

DVDD_3P3

8-bit capture, D[7:0] are Port A YCbCr data inputs

and D[15:8] are Port B YCbCr data inputs. For RGB

VIN[0]A_D[19]/

PULL: IPD / IPD

VIN[1]A,

capture, D[23:16] are R, D[15:8] are G, and D[7:0] are

VIN[1]A_DE[0]/

AK4

DRIVE: Z / Z

VOUT[1]

B data inputs.

VOUT[1]_C[9]

DVDD_3P3

PINCTRL25

VIN[0]A_D[18]/

PULL: IPD / IPD

VIN[1]A,

VIN[1]A_FLD/

AK5

DRIVE: Z / Z

VOUT[1]

VOUT[1]_C[8]

DVDD_3P3

PINCTRL24

VIN[0]A_D[17]/

PULL: IPD / IPD

VIN[1]A,

VIN[1]A_VSYNC/

AL5

DRIVE: Z / Z

VOUT[1]

VOUT[1]_VSYNC

DVDD_3P3

PINCTRL23

VIN[0]A_D[16]/

PULL: IPD / IPD

VIN[1]A,

VIN[1]A_HSYNC/

AT5

DRIVE: Z / Z

VOUT[1]

VOUT[1]_FLD

DVDD_3P3

PINCTRL22

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal.

(2)

PULL: A / B, where:

A is the state of the internal pull resistor during POR reset

B is the state of the internal pull resistor after POR and Warm reset are de-asserted and during Warm reset

IPD = Internal Pulldown Enabled, IPU = Internal Pullup Enabled, DIS = Internal Pull Disabled

DRIVE: A / B, where;

A is the driving state of the pin during POR reset

B is the driving state of the pin after POR and Warm reset are de-asserted and during Warm reset

H = Driving High, L = Driving Low, Z = 3-State

For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see

Section 4.2.1, Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal.

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