TDA8296 datasheet(44/87 Pages) NXP

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TDA8296

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Product data sheet

Rev. 1 — 3 March 2011

44 of 87

NXP Semiconductors

TDA8296

Digital global standard low IF demodulator for analog TV and FM radio

9.3.15 ADC control

In the TDA8296 a 12-bit ADC is implemented sampling with a 54 MHz clock (27 MHz

optional).

STDBY

R/W

When STDBY is set to logic 1, the chip enters in Standby

mode, and its power consumption is reduced. The IF AGC pin

is set to high-ohmic. The default value is logic 0, which means

that the chip is active.

Normal mode

Standby mode

CLB

R/W

This signal clears the TDA8296 through the I2C-bus interface

(software reset). To activate the reset, just write CLB = 0. This

software reset will not affect the content of the registers.

activate soft reset

normal operation

Table 47.

CLB_STDBY register (address 30h) bit description …continued

Legend: * = default value.

Bit

Symbol Access Value

Description

Table 48.

ADC_CTL register (address 33h) bit description

Legend: * = default value.

Bit

Symbol

Access Value

Description

7 to 4 -

R/W

0010*

reserved, must be set to logic 0010

DCIN

R/W

The input signal of the ADC can be either AC coupled by

means of two capacitors or connected directly to the inputs

(DC coupled).

AC coupling

DC coupling

R/W

reserved, must be set to logic 1

SLEEP

R/W

When HIGH, SLEEP sets the ADC into its Sleep mode. Both

bias current and clock are switched off. In this mode, the

current consumption is reduced by a factor of 6. The

reference circuit will remain active in order to guarantee a fast

recovery from Sleep mode.

Normal mode

ADC Sleep mode

PD_ADC

R/W

When HIGH, PD_ADC sets the ADC into its Power-down

mode. All internal currents are switched off. In this mode, the

current consumption is near zero (leakage current only).

Normal mode

ADC Power-down mode

Table 49.

ADC_CTL_2 register (address 34h) bit description

Legend: * = default value.

Bit

Symbol

Access Value

Description

7 to 3

R/W

0000 0* not used

2 and 1 -

R/W

10*

reserved, must be set to logic 10

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