TDA8296 datasheet(86/87 Pages) NXP

86 / 87 page

TDA8296

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 3 March 2011

86 of 87

NXP Semiconductors

TDA8296

Digital global standard low IF demodulator for analog TV and FM radio

22. Figures

Fig 1.

Functional diagram of TDA8296 . . . . . . . . . . . . . .6

Fig 2.

Pin configuration for HVQFN40 . . . . . . . . . . . . . . .7

Fig 3.

I2C-bus Write mode . . . . . . . . . . . . . . . . . . . . . . .13

Fig 4.

Examples I2C-bus Write mode. . . . . . . . . . . . . . .13

Fig 5.

I2C-bus Read mode . . . . . . . . . . . . . . . . . . . . . . .14

Fig 6.

Example I2C-bus Read mode . . . . . . . . . . . . . . .14

Fig 7.

TDA8296 DTO_PC characteristic . . . . . . . . . . . .27

Fig 8.

TDA8296 DTO_SC characteristic . . . . . . . . . . . .28

Fig 9.

Video low-pass filters for sound carrier

suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Fig 10. Notch filter for adjacent sound carrier

suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Fig 11. Video low pass frequency response in

smooth roll off or low ripple mode . . . . . . . . . . . .30

Fig 12. SSIF and FM radio band-pass filters

(center frequency 5.5 MHz chosen). . . . . . . . . . .31

Fig 13. Video equalizer curves. . . . . . . . . . . . . . . . . . . . .36

Fig 14. TDA8296 SSIF characteristic versus CS

(refer to Figure 23) typical values; termination

Ω and 1 kΩ in parallel . . . . . . . . . . . . . . . . . . .40

Fig 15. TDA8296 AFC characteristic . . . . . . . . . . . . . . . .42

Fig 16. Internal low IF frequency response in front

of the VIF demodulator . . . . . . . . . . . . . . . . . . . .45

Fig 17. Example for the programmable group delay

equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50

Fig 18. Example for the programmable video

equalizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

Fig 19. Typical application of TDA8296 . . . . . . . . . . . . . .64

Fig 20. IF input application for interlacing TDA1827x . . .64

Fig 21. IF input application. . . . . . . . . . . . . . . . . . . . . . . .64

Fig 22. Main application diagram . . . . . . . . . . . . . . . . . . .65

Fig 23. 75

Ω load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66

Fig 24. High ohmic load . . . . . . . . . . . . . . . . . . . . . . . . . .66

Fig 25. Buffer application with 75

Ω load . . . . . . . . . . . . .67

Fig 26. PCB pattern using circuit diagrams

of Figure 20, Figure 22, Figure 23 and 16 MHz

reference from XTAL . . . . . . . . . . . . . . . . . . . . . .67

Fig 27. PCB pattern using circuit diagrams

of Figure 20, Figure 22, Figure 23

and 16 MHz reference from master . . . . . . . . . . .68

Fig 28. TDA8296 calculated DAC characteristic . . . . . . .69

Fig 29. Internal CVBS signal in front of video DAC

(typical characteristic) . . . . . . . . . . . . . . . . . . . . .70

Fig 30. Internal SSIF signal in front of sound DAC

(typical characteristic, also dependent on

SSIF_LVL[7:0] at address 23h) . . . . . . . . . . . . . .70

Fig 31. Hardware reset operation . . . . . . . . . . . . . . . . . .71

Fig 32. Reference clock application . . . . . . . . . . . . . . . . .72

Fig 33. Oscillator application . . . . . . . . . . . . . . . . . . . . . .72

Fig 34. Boundary scan block diagram . . . . . . . . . . . . . . .75

Fig 35. Boundary scan timing diagram . . . . . . . . . . . . . .76

Fig 36. Package outline SOT618-1 (HVQFN40) . . . . . . .77

Fig 37. Temperature profiles for large and small

components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80

TDA8296 Datasheet(PDF) 86 Page - NXP Semiconductors

TDA8296 Datasheet(HTML) 86 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87

Datasheet Download

Link URL