TDA8296 datasheet(8/87 Pages) NXP

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TDA8296

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Product data sheet

Rev. 1 — 3 March 2011

8 of 87

NXP Semiconductors

TDA8296

Digital global standard low IF demodulator for analog TV and FM radio

7.2 Pin description

GPIO2/SDA_O

GPIO1/SCL_O

GPIO0/VSYNC

VDDDR(3V3)

VSSDR

i.c.

IF_AGC

i.c.

n.c.

VSSA(ADC)

die pad

global ground at backside contact

Table 3.

Pin allocation table …continued

Symbol

Table 4.

Pin description

Symbol

Type[1]

Description

Reset

RST_N

The RST_N input is asynchronous and active LOW, and clears the TDA8296. When

RST_N goes LOW, the circuit immediately enters its Reset mode and normal

operation will resume four XIN signal falling edges later after RST_N returns HIGH.

Internal register contents are all initialized to their default values. The minimum width

of RST_N at LOW level is four XIN clock periods.

Reference

XIN

Crystal oscillator input pin. In Slave mode (typically), the XIN input simply receives a

16 MHz clock signal (fREF) from an external device (typically from the TDA1827x). In

Oscillator mode, a fundamental 16 MHz (typically) crystal is connected between

pin XIN and pin XOUT.

XOUT

Crystal oscillator output pin. In Slave mode, the XOUT output is not connected. In

Oscillator mode a fundamental 16 MHz (typically) crystal is connected between pin

XIN and pin XOUT.

I2C-bus

SDA

I/O, OD

I2C-bus bidirectional serial data. SDA is an open-drain output and therefore requires

an external pull-up resistor (typically 4.7 k

Ω).

SCL

I2C-bus clock input. SCL is nominally a square wave with a maximum frequency of

400 kHz. It is generated by the system I2C-bus master.

SADDR0

These two bits allow to select four possible I2C-bus addresses, and therefore

permits to use several TDA8296 in the same application and/or to avoid conflict with

other ICs. The complete I2C-bus address is: 1, 0, 0, SADDR1, 0, 1, SADDR0, R/W

(see also Section 9.1).

SADDR1

I2C-bus feed-through switch or GPIO

GPIO2/SDA_O 31

I/O, OD

SDA_O is equivalent to SDA but can be 3-stated by I2C-bus programming. It is the

output of a switch controlled by I2CSW_EN parameter. SDA_O is an open-drain

output and therefore requires an external pull-up resistor (see Section 9.3.18).

GPIO1/SCL_O

I/O, OD

SCL_O is equivalent to SCL input but can be 3-stated by I2C-bus programming.

SCL_O is an open-drain output and therefore requires an external pull-up resistor

(see Section 9.3.18). For proper functioning of the I2C-bus feed-through, a capacitor

C = 33 pF to GND must be added (see Section 13.6).

V-sync or GPIO

GPIO0/VSYNC 33

I/O, OD

vertical synchronization pulse needed for the NXP Silicon Tuner

(see Section 9.3.18)

Tuner IF AGC

IF_AGC

I/O, OD, T tuner IF AGC output

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