| Electronic Components Datasheet Search |
|
TAS5548 Datasheet(PDF) 9 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TAS5548 Datasheet(HTML) 9 Page - Texas Instruments |
|
9 / 120 page ![]() TAS5548 www.ti.com SLES270 – NOVEMBER 2012 Table 2-1. Serial Data Formats (continued) RECEIVE SERIAL DATA FORMAT WORD LENGTH Right-justified 20 Right-justified 24 I2S 16 I2S 20 I2S 24 Left-justified 16 Left-justified 20 Left-justified 24 Serial data is input on SDIN1-5. The device will accept 32, 44.1, 48, 88.2, 96, 176.4 and 192 kHz serial data in 16, 20 or 24-bit data in Left, Right and I2S serial data formats using a 64 Fs SCLK clock and a 128, 192, 256, 384, or 512 * Fs MCLK rates (up to a maximum of 50 MHz). Serial Data is output on SDOUT. The SDOUT data format is I2S 24 bit. The parameters of this clock and serial data interface are I2C configurable. But the default is autodetect. In some cases the device will work without MCLK by connecting SCLK to MCLK. 2.4.4 I 2C Serial-Control Interface The TAS5548 has an I2C serial-control slave interface to receive commands from a system controller. The serial-control interface supports both normal-speed (100-kHz) and high-speed (400-kHz) operations without wait states. The serial control interface supports both single-byte and multiple-byte read/write operations for status registers and the general control registers associated with the PWM. However, for the DAP data- processing registers, the serial control interface also supports multiple-byte (4-byte) write operations. The I2C supports a special mode which permits I2C write operations to be broken up into multiple data- write operations that are multiples of 4 data bytes. These are 6-byte, 10-byte, 14-byte, 18-byte, etc., write operations that are composed of a device address, read/write bit, subaddress, and any multiple of 4 bytes of data. This permits the system to incrementally write large register values with multiple 4 byte transfers. I2C transactions. In order to use this feature, the first block of data is written to the target I2C address, and each subsequent block of data is written to a special append register (0xFE) until all the data is written and a stop bit is sent. An incremental read operation is not supported using 0xFE. 2.4.5 Device Control The control section provides the control and sequencing for the TAS5548. The device control provides both high- and low-level control for the serial control interface, clock and serial data interfaces, digital audio processor, and pulse-width modulator sections. 2.4.6 Energy Manager Energy Manager monitors the overall energy (power) in the system. It can be programmed to monitor the energy of all channels or satellite and sub separately. The output of energy manager, all called EMO, is a flag that is set when the energy level crosses above the programmed threshold. This level is indicated in internal status registers as well as in pin output. 2.4.7 Digital Audio Processor (DAP) The DAP arithmetic unit is used to implement all audio-processing functions: soft volume, loudness compensation, bass and treble processing, dynamic range control, channel filtering, and input and output mixing. Figure 3-1 shows the TAS5548 DAP architecture. Copyright © 2012, Texas Instruments Incorporated Description 9 Submit Documentation Feedback Product Folder Links: TAS5548 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |