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LP8556 Datasheet(PDF) 34 Page - Texas Instruments |
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LP8556 Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 52 page ![]() LP8556 SNVS871B – JULY 2012 – REVISED SEPTEMBER 2012 www.ti.com Device Control register BL_CTL 0 R/W Enable backlight when Brightness Register is used to control brightness ( BRT_MODE = 10 ). 0 = Backlight disabled and chip turned off 1 = Backlight enabled and chip turned on This bit has no effect when PWM pin control is selected for brightness control ( BRT_MODE = 00). In this mode the state of PWM pin enable or disables the chip. STATUS Address 02h Reset value 0000 0000b Fault register 7 6 5 4 3 2 1 0 OPEN SHORT VREF_OK VBOOST_OK OVP OCP TSD UVLO Name Bit Access Description OPEN 7 R LED open fault detection 0 = No fault 1 = LED open fault detected. The value is not latched. SHORT 6 R LED short fault detection 0 = No fault 1 = LED short fault detected. The value is not latched. VREF_OK 5 R Internal VREF node monitor status 1 = VREF voltage is OK. VBOOST_OK 4 R Boost output voltage monitor status 0 = Boost output voltage has not reached its target (VBOOST < Vtarget - 2.5V) 1 = Boost output voltage is OK. The value is not latched. OVP 3 R Overvoltage protection 0 = No fault 1 = Overvoltage condition occurred. Fault is cleared by reading the register 02h. OCP 2 R Over current protection 0 = No fault 1 = Over current detected in boost output. OCP detection block monitors the boost output and if the boost output has been too low for more than 50 ms it will generate OCP fault and disable the boost. Fault is cleared by reading the register 02h. After clearing the fault boost will startup again. TSD 1 R Thermal shutdown 0 = No fault 1 = Thermal fault generated, 150 °C reached. Boost converter and LED outputs will be disabled until the temperature has dropped down to 130 °C. Fault is cleared by reading this register. UVLO 0 R Under voltage detection 0 = No fault 1 = Under voltage detected on the VDD pin. Boost converter and LED outputs will be disabled until VDD voltage is above the UVLO threshold voltage. Threshold voltage is set with EPROM bits. Fault is cleared by reading this register. 34 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: LP8556 |
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