ADS4449 datasheet(25/54 Pages) TI

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SDATA

SCLK

DSU

SEN

SLOADS

SLOADH

RESET

ADS4449

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SBAS603 – APRIL 2013

DEVICE CONFIGURATION

The ADS4449 can be configured with a serial programming interface (SPI), as described in the Serial Interface

section. In addition, the device has control pins that control power-down.

SERIAL INTERFACE

The device has a set of internal registers that can be accessed by the serial interface formed by the SEN (serial

interface enable), SCLK (serial interface clock), SDATA (serial interface input data), and SDOUT (serial interface

readback data) pins. Serially shifting bits into the device is enabled when SEN is low. Serial data (SDATA) are

latched at every SCLK falling edge when SEN is active (low). Serial data are loaded into the register at every

16th SCLK falling edge when SEN is low. When the word length exceeds a multiple of 16 bits, the excess bits

are ignored. Data can be loaded in multiples of 16-bit words within a single active SEN pulse. The first eight bits

form the register address and the remaining eight bits are the register data. The interface can function with SCLK

frequencies from 20 MHz down to very low speeds (of a few hertz) and also with a non-50% SCLK duty cycle.

After power-up, the internal registers must be initialized to the default values. This initialization can be

accomplished in one of two ways:

1. Either through a hardware reset by applying a high pulse on the RESET pin (of widths greater than 10 ns),

as shown in Figure 42; or

2. By applying a software reset. When using the serial interface, set the RESET bit (D1 in register 00h) high.

This setting initializes the internal registers to the default values and then self-resets the RESET bit low. In

this case, the RESET pin is kept low.

Figure 42. Serial Interface Timing

Table 3. Timing Characteristics for Figure 42

PARAMETER

MIN

TYP

MAX

UNIT

fSCLK

SCLK frequency (equal to 1 / tSCLK)

> dc

MHz

tSLOADS

SEN to SCLK setup time

tSLOADH

SCLK to SEN hold time

tDSU

SDI setup time

tDH

SDI hold time

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