ADS4449 datasheet(26/54 Pages) TI

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SCLK

SDOUT

tSD_DELAY

SDATA

SCLK

SEN

a) Enable serial readout (READOUT = 1)

SDATA

SCLK

SEN

SDOUT

b) Read contents of Register 45h. This register is initialized with 04h.

SDOUT

The SDOUT pin is in a high-impedance state (READOUT = 0).

The SDOUT pin functions as a serial readout (READOUT = 1).

ADS4449

SBAS603 – APRIL 2013

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Serial Register Readout

The device includes a mode where the contents of the internal registers can be read back, as shown in

Figure 43. This readback mode can be useful as a diagnostic check to verify the serial interface communication

between the external controller and ADC.

1. Set the READOUT register bit to '1'. This setting disables any further writes to the registers except register

address 00h.

2. Initiate a serial interface cycle specifying the address of the register (A[7:0]) whose content must be read.

3. The device outputs the contents (D[7:0]) of the selected register on the SDOUT pin (pin G10).

4. The external controller can latch the contents at the SCLK falling edge.

5. To enable register writes, reset the READOUT register bit to '0'.

Note that the contents of register 00h cannot be read back because the register contains RESET and READOUT

bits. When the READOUT bit is disabled, the SDOUT pin is in a high-impedance state. If serial readout is not

used, the SDOUT pin must not be connected (must float).

Figure 43. Serial Readout Timing Diagram

SDOUT comes out at the SCLK rising edge with an approximate delay (tSD_DELAY) of 8 ns, as shown in Figure 44.

Figure 44. SDOUT Delay Timing

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ADS4449 Datasheet(PDF) 26 Page - Texas Instruments