AM79C972 datasheet(76/130 Pages) AMD

76 / 130 page

Am79C972

Figure 41.

EPROM Only Configuration for the Expansion Bus (>64K EPROM)

Since setting MEMEN also enables memory mapped

access to the I/O resources, attention must be given to

the PCI Memory Mapped I/O Base Address register,

before enabling access to the Expansion ROM. The

host must set the PCI Memory Mapped I/O Base Ad-

dress register to a value that prevents the Am79C972

controller from claiming any memory cycles not in-

tended for it.

During the boot procedure, the system will try to find an

Expansion ROM. A PCI system assumes that an Ex-

pansion ROM is present when it reads the ROM signa-

ture 55h (byte 0) and AAh (byte 1).

Direct Flash Access

Am79C972 controller supports Flash as an Expansion

ROM device, as well as providing a read/write data

path to the Flash. The Am79C972 controller will sup-

port up to 1 Mbyte of Flash on the Expansion Bus. The

Flash is accessed by a read or write to the Expansion

Bus Data port (BCR30). The user must load the upper

address EPADDRU (BCR 29, bits 3-0) and then set the

FLASH (BCR29, bit 15) bit to a 1. The Flash read/write

utilizes the PCI clock instead of the EBCLK during all

accesses. EPADDRU is not needed if the Flash size is

64K or less, but still must be programmed. The user will

then load the lower 16 bits of address, EPADDRL (BCR

28, bits 15-0).

Flash/EPROM Read

A read to the Expansion Bus Data Port (BCR30) will

start a read cycle on the Expansion Bus Interface. The

Am79C972 controller will drive EBUA_EBA[7:0] with

the most significant address byte at the same time the

Am79C972 controller will drive AS_EBOE high to

strobe the address in the external ‘374 (D flip-flop). On

the next clock, the Am79C972 controller will drive

EBDA[15:8] and EBUA_EBA[7:0] with the middle and

least significant address bytes.

EBUA_EBA[7:0]

EBDA[15:8]

EBD[7:0]

EBWE

EROMCS

A[15:8]

A[7:0]

DQ[7:0]

Am79C972

EPROM

AS_EBOE

’374

D-FF

A[23:16]

21485C-44

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