AM79C976 datasheet(234/309 Pages) AMD

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234

Am79C976

8/01/00

P R E L I M INARY

430

ERR

Error Summary. ERR is the OR of FRAM, OFLO, and CRC. ERR is set by the

Am79C976 controller and cleared by the host.

429

FRAM

Framing error indicates that the incoming frame contains a non-integer multiple of

eight bits and there was an FCS error. If there was no FCS error on the incoming

frame, then FRAM will not be set even if there was a non-integer multiple of eight bits

in the frame. FRAM is not valid in internal loopback mode. FRAM is valid only when

ENP is set and OFLO is not. FRAM is set by the Am79C976 controller and cleared

by the host.

428

OFLO

Overflow error indicates that the receiver has lost all or part of the incoming frame,

due to an inability to move data from the receive FIFO into a memory buffer before

the internal FIFO overflowed. OFLO is set by the Am79C976 controller and cleared

by the host.

CRC

CRC indicates that the receiver has detected a CRC (FCS) error on the incoming

frame. CRC is valid only when ENP is set and OFLO is not. CRC is set by the

Am79C976 controller and cleared by the host. CRC will also be set when Am79C976

controller receives an RX_ER indication from the external PHY through the MII.

Reserved.

425

STP

Start of Packet indicates that this is the first buffer used by the Am79C976 controller

for this frame. If STP and ENP are both set to 1, the frame fits into a single buffer.

Otherwise, the frame is spread over more than one buffer. When LAPPEN (CSR3,

bit 5) is cleared to 0, STP is set by the Am79C976 controller and cleared by the host.

When LAPPEN is set to 1, STP must be set by the host.

424

ENP

End of Packet indicates that this is the last buffer used by the Am79C976 controller

for this frame. It is used for data chaining buffers. If both STP and ENP are set, the

frame fits into one buffer and there is no data chaining. ENP is set by the Am79C976

controller and cleared by the host.

Reserved.

422

PAM

Physical Address Match is set by the Am79C976 controller when it accepts the

received frame due to a match of the frame’s destination address with the content of

the physical address register. PAM is valid only when ENP is set. PAM is set by the

Am79C976 controller and cleared by the host.

This bit does not exist when the Am79C976 controller is programmed to use 16-bit

software structures for the descriptor ring entries (BCR20, bits 7-0, SWSTYLE is

cleared to 0).

421

LAFM

Logical Address Filter Match is set by the Am79C976 controller when it accepts the

received frame based on the value in the logical address filter register. LAFM is valid

only when ENP is set. LAFM is set by the Am79C976 controller and cleared by the

host.

Note that if DRCVBC (CSR15, bit 14) is cleared to 0, only BAM, but not LAFM will

be set when a Broadcast frame is received, even if the Logical Address Filter is

programmed in such a way that a Broadcast frame would pass the hash filter. If

DRCVBC is set to 1 and the Logical Address Filter is programmed in such a way that

a Broadcast frame would pass the hash filter, LAFM will be set on the reception of a

Broadcast frame.

This bit does not exist when the Am79C976 controller is programmed to use 16-bit

software structures for the descriptor ring entries (BCR20, bits 7-0, SWSTYLE is

cleared to 0).

Offset

Bit

Name

Description

AM79C976 Datasheet(PDF) 234 Page - Advanced Micro Devices

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