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AM79C976 Datasheet(PDF) 233 Page - Advanced Micro Devices |
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AM79C976 Datasheet(HTML) 233 Page - Advanced Micro Devices |
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233 / 309 page  8/01/00 Am79C976 233 P R E L I M INARY 7DEOH 5HFHLYH 'HVFULSWRU 6:67</( 422 PAM Physical Address Match is set by the Am79C976 controller when it accepts the received frame due to a match of the frame’s destination address with the content of the physical address register. PAM is valid only when ENP is set. PAM is set by the Am79C976 controller and cleared by the host. This bit does not exist when the Am79C976 controller is programmed to use 16-bit software structures for the descriptor ring entries (BCR20, bits 7-0, SWSTYLE is cleared to 0). 421 LAFM Logical Address Filter Match is set by the Am79C976 controller when it accepts the received frame based on the value in the logical address filter register. LAFM is valid only when ENP is set. LAFM is set by the Am79C976 controller and cleared by the host. Note that if DRCVBC (CSR15, bit 14) is cleared to 0, only BAM, but not LAFM will be set when a Broadcast frame is received, even if the Logical Address Filter is programmed in such a way that a Broadcast frame would pass the hash filter. If DRCVBC is set to 1 and the Logical Address Filter is programmed in such a way that a Broadcast frame would pass the hash filter, LAFM will be set on the reception of a Broadcast frame. This bit does not exist when the Am79C976 controller is programmed to use 16-bit software structures for the descriptor ring entries (BCR20, bits 7-0, SWSTYLE is cleared to 0). 4 20 BAM Broadcast Address Match is set by the Am79C976 controller when it accepts the received frame, because the frame’s destination address is of the type ’Broadcast.’ BAM is valid only when ENP is set. BAM is set by the Am79C976 controller and cleared by the host. This bit does not exist when the Am79C976 controller is programmed to use 16-bit software structures for the descriptor ring entries (BCR20, bits 7-0, SWSTYLE is cleared to 0). 4 19-16 Reserved. 4 15-0 BCNT Buffer Byte Count is the length of the buffer pointed to by this descriptor, expressed as the two’s complement of the length of the buffer. This field is written by the host and unchanged by the Am79C976 controller. 8 31-0 RBADR[31:0] Receive Buffer Address. This field contains the address of the receive buffer that is associated with this descriptor. 0Ch 31:0 USER SPACE User Space. Reserved for user defined data. Offset Bit Name Description 0 31-16 TCI[15:0] VLAN Tag Control Information copied from the received frame. 15-0 MCNT Message Byte Count is the number of bytes of the received message written to the receive buffer. This is the actual frame length (including FCS) unless stripping is enabled and the length field is < 46 bytes. In this case, MCNT is 14 + length_field. MCNT can take values in the range 15 to 59 and values greater than or equal to 64. MCNT is expressed as an unsigned binary integer. MCNT is valid only when ERR is clear and ENP is set. MCNT is written by the Am79C976 controller and cleared by the host. 431 OWN This bit indicates whether the descriptor entry is owned by the host (OWN = 0) or by the Am79C976 controller (OWN = 1). The host sets the OWN bit after it has emptied the buffer pointed to by the descriptor entry. The Am79C976 controller clears the OWN bit after filling the buffer that the descriptor points to. Both the Am79C976 controller and the host must not alter a descriptor entry after it has relinquished ownership. Offset Bit Name Description |
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