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FG256 Datasheet(PDF) 67 Page - Actel Corporation |
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FG256 Datasheet(HTML) 67 Page - Actel Corporation |
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67 / 108 page ![]() SX-A Family FPGAs v5.3 2-47 tQCKH Input Low to High (100% Load) (Pad to R-cell Input) 1.7 1.9 2.2 2.5 3.5 ns tQCHKL Input High to Low (100% Load) (Pad to R-cell Input) 1.7 2 2.2 2.6 3.6 ns tQPWH Minimum Pulse Width High 1.5 1.7 2.0 2.3 3.2 ns tQPWL Minimum Pulse Width Low 1.5 1.7 2.0 2.3 3.2 ns tQCKSW Maximum Skew (Light Load) 0.2 0.3 0.3 0.3 0.5 ns tQCKSW Maximum Skew (50% Load) 0.4 0.5 0.5 0.6 0.9 ns tQCKSW Maximum Skew (100% Load) 0.4 0.5 0.5 0.6 0.9 ns Table 2-37 • A54SX72A Timing Characteristics (Continued) (Worst-Case Commercial Conditions VCCA = 2.25 V, VCCI = 3.0 V, TJ = 70°C) Parameter Description –3 Speed* –2 Speed –1 Speed Std. Speed –F Speed Units Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Note: *All –3 speed grades have been discontinued. |
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