FG256 datasheet(16/108 Pages) ACTEL

16 / 108 page

SX-A Family FPGAs

1- 12

v5.3

SX-A Probe Circuit Control Pins

SX-A devices contain internal probing circuitry that

provides built-in access to every node in a design,

enabling 100% real-time observation and analysis of a

device's internal logic nodes without design iteration.

The probe circuitry is accessed by Silicon Explorer II, an

easy to use, integrated verification and logic analysis tool

that can sample data at 100 MHz (asynchronous) or

66 MHz (synchronous). Silicon Explorer II attaches to a

PC’s standard COM port, turning the PC into a fully

functional 18-channel logic analyzer. Silicon Explorer II

allows designers to complete the design verification

process at their desks and reduces verification time from

several hours per cycle to a few seconds.

The Silicon Explorer II tool uses the boundary-scan ports

(TDI, TCK, TMS, and TDO) to select the desired nets for

verification. The selected internal nets are assigned to the

PRA/PRB pins for observation. Figure 1-13 illustrates the

interconnection between Silicon Explorer II and the FPGA

to perform in-circuit verification.

Design Considerations

In order to preserve device probing capabilities, users

should avoid using the TDI, TCK, TDO, PRA, and PRB pins

as input or bidirectional ports. Since these pins are active

during probing, critical input signals through these pins

are not available. In addition, the security fuse must not

be programmed to preserve probing capabilities. Actel

recommends that you use a 70

Ω series termination

resistor on every probe connector (TDI, TCK, TMS, TDO,

PRA, PRB). The 70

Ω series termination is used to prevent

data

transmission

corruption

during

probing

and

reading back the checksum.

Figure 1-13 • Probe Setup

SX-A FPGA

TDI

TCK

TMS

TDO

PRA

PRB

Serial Connection

Silicon Explorer II

FG256 Datasheet(PDF) 16 Page - Actel Corporation

FG256 Datasheet(HTML) 16 Page - Actel Corporation

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