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LM98714 Datasheet(PDF) 20 Page - Texas Instruments

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Part # LM98714
Description  LM98714 Three Channel, 16-Bit, 45 MSPS Analog Front End with LVDS/CMOS Output
PDF  115 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM98714 Datasheet(HTML) 20 Page - Texas Instruments

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OS
R
OS
G
OS
B
Input Bias/
Clamping
Input Bias/
Clamping
Input Bias/
Clamping
CDS
or
Sample/Hold
Amplifier
CDS
or
Sample/Hold
Amplifier
CDS
or
Sample/Hold
Amplifier
PGA
PGA
PGA
3:1
MUX
5:1
MUX
COLOR1DAC[9:0]
COLOR2DAC[9:0]
COLOR3DAC[9:0]
COLOR4DAC[9:0]
COLOR5DAC[9:0]
COLOR2DAC[9:0]
COLOR3DAC[9:0]
5:1
MUX
COLOR1PGA[7:0]
COLOR2PGA[7:0]
COLOR3PGA[7:0]
COLOR4PGA[7:0]
COLOR5PGA[7:0]
COLOR2PGA[7:0]
COLOR3PGA[7:0]
Black
Level
Offset
DAC
Black
Level
Offset
DAC
Black
Level
Offset
DAC
LM98714
SNAS254A – OCTOBER 2006 – REVISED JANUARY 2014
www.ti.com
MODE 1B - ONE CHANNEL COLOR INPUT PER LINE/SEQUENTIAL LINE (INPUT) SAMPLING/THREE
CHANNEL PROCESSING
In Mode 1b, the OSR, OSG, and OSB inputs are sampled sequentially and processed through their respective
channels. This mode allows an entire line of Red, Green, or Blue Pixels to be sampled before sequencing to the
next input. This mode is useful with sensors that output whole lines of pixels of a single color. The order in which
the channels are sampled is fully programmable. Actual switching from channel to channel is triggered by an SH
pulse. The first SH pulse after this mode is set (or reset) sets up the first programmed channel for gain and offset
and initiates sampling through that channel alone. The next SH pulse switches the active channel to the second
channel indicated by the configuration registers. This sequencing with SH pulses continues to the third channel
and then continuously loops through the channels.
Figure 8. Mode 1b Signal Routing
Table 4. Mode 1b Operating Details
Detail
One channel active per line. Active channel is sequenced by
Channels Active
OSB or OSG or OSR
SH pulse at start of new line.
Channel Sample Rate
30
MSPS per Channel (max)
ADC Sample Rate
30
MSPS (max)
fADC: fINCLK
Internal 1x Clock Selected
1:01
fINCLK = 30MHz (max)
SH Signal
→ R-R-R-R-R-R-R-R-R-R-R-R-R→
→SH Signal → G-G-G-G-G-G-G-G-G-G-G-G-G→
→SH Signal → B-B-B-B-B-B-B-B-B-B-B-B-B-B→
Output Sequencing
or
SH Signal
→ B-B-B-B-B-B-B-B-B-B-B-B-B-B→
→SH Signal → G-G-G-G-G-G-G-G-G-G-G-G-G→
→SH Signal → R-R-R-R-R-R-R-R-R-R-R-R-R→
20
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Product Folder Links: LM98714



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