UM0434 datasheet(161/390 Pages) STMICROELECTRONICS

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Interrupts and exceptions

UM0434

162/391

Table 114.

Exceptions and conditions

Interrupt type

IVOR

Cause

Section/page

System reset

(not an interrupt)

None

(1)

Reset by assertion of

p_reset_b

Watchdog timer reset control

Debug reset control

—

Critical input

0(2)

p_critint_b is asserted and MSR[CE]=1

Chapter 6.6.1

Machine check

p_mcp_b is asserted and MSR[ME] =1

ISI, ITLB error on first instruction fetch for an exception handler and

current MSR[ME] = 1

Write bus error on buffered store or cache line push and current

MSR[ME]=1

Bus error (XTE) with MSR[EE]=0 and current MSR[ME]=1

Chapter 6.6.2

Data storage

Access control

Byte ordering due to misaligned access across page boundary to

pages with mismatched E bits

Precise external termination error (

p_d_tea_b assertion and precise

recognition) and MSR[EE]=1

Chapter 6.6.3

Instruction

storage

Access control

Precise external termination error (

p_i_tea_b assertion and precise

recognition) and MSR[EE]=1

Byte ordering due to misaligned instruction across page boundary to

pages with mismatched VLE bits, or access to page with VLE set, and

E indicating little-endian.

Misaligned Instruction fetch due to a change of flow to an odd halfword

instruction boundary on a Book E (non-VLE) instruction page, due to

value in LR, CTR, or xSRR0

Chapter 6.6.4

External input

p_extint_b is asserted and MSR[EE]=1

Chapter 6.6.5

Alignment

lmw, stmw not word aligned

lwarx or stwcx. not word aligned

dcbz with disabled cache, or no cache present, or to W or I storage

Chapter 6.6.6

Program

Illegal, privileged, trap, floating-point enabled, APU enabled,

unimplemented operation

Chapter 6.6.7

Floating-point

unavailable

MSR[FP] = 0 and attempt to execute a Book E floating-point operation

Chapter 6.6.8

System call

Execution of the system call (sc) instruction

Chapter 6.6.9

APU unavailable

Unused by the e200z3

Chapter 6.6.10

Decrementer

As specified in Book E

Chapter 6.6.11

Fixed-interval

timer

As specified in Book E

Chapter 6.6.12

Watchdog timer

As specified in Book E

Chapter 6.6.13

Data TLB error

Data translation lookup did not match a valid TLB entry.

Chapter 6.6.14

Instruction TLB

error

Instruction translation lookup did not match a valid TLB entry.

Chapter 6.6.15

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