UM0434 datasheet(166/390 Pages) STMICROELECTRONICS

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UM0434

Interrupts and exceptions

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IVPR fields are defined in

Table 122.

6.5

Interrupt vector offset registers (IVORn)

IVORs are used during interrupt processing for determining the starting address of a

software interrupt handler. The value in the vector offset field of the IVOR assigned to the

interrupt type is concatenated with the value in IVPR to form an instruction address at which

execution is to begin. The e200z3 also defines the low-order bits of the IVORs (defined as

zeros in Book E) as a context selector field to be used as the current context number once

interrupt handling begins when multiple hardware contexts are supported

(CTXCR[NUMCTX]

≠ 0). For forward compatibility, this field should be written to zero when

only a single context is supported because it will not be implemented and is read as zero.

The IVOR fields are defined in

Table 123.

Table 121.

IVPR register

Field

Vector Base

—

Reset

Undefined on

m_por assertion, unchanged on p_reset_b assertion

R/W

SPR

SPR 63

Table 122.

IVPR field descriptions

Bits

Name

Description

32–47

Vector

Base

Defines the base location of the vector table, aligned to a 64-Kbyte boundary. This field provides

the high-order 16 bits of the location of all interrupt handlers. The contents of the IVOR

appropriate for the type of exception being processed are concatenated with the IVPR vector base

to form the address of the handler in memory.

48–63

—

Reserved, should be cleared.

47 48

59 60

Field

—

Vector Offset

—

Reset

Unaffected

R/W

SPR

See

Table 124.

Table 123.

IVOR register fields

Bits

Name

Description

32–47

—

Reserved, should be cleared.

48–59

Vector

Offset

Vector offset. Provides a quadword index from the base address provided by the IVPR to locate an

interrupt handler.

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