UM0434 datasheet(167/390 Pages) STMICROELECTRONICS

167 / 390 page

Interrupts and exceptions

UM0434

168/391

IVOR SPR assignments are shown in

Table 124.

6.6

Interrupt definitions

The following sections describe interrupts as they are implemented on the e200z3.

—

Reserved, should be cleared.

61–63

Context selector. When multiple hardware contexts are supported, this selects an operating context

for the interrupt handler. This value is loaded into the CURCTX field of the context control register

as part of the interrupt vectoring process. This field is not defined by PowerPC Book E. When

multiple hardware contexts are not supported, this field is not implemented and is read as zero.

Table 123.

IVOR register fields (continued)

Bits

Name

Description

Table 124.

IVOR assignments

IVOR Number

SPR

Interrupt type

IVOR0

400

Critical input

IVOR1

401

Machine check

IVOR2

402

Data storage

IVOR3

403

Instruction storage

IVOR4

404

External input

IVOR5

405

Alignment

IVOR6

406

Program

IVOR7

407

Floating-point unavailable

IVOR8

408

System call

IVOR9

409

Auxiliary processor unavailable. Not used by the e200z3.

IVOR10

410

Decrementer

IVOR11

411

Fixed-interval timer interrupt

IVOR12

412

Watchdog timer interrupt

IVOR13

413

Data TLB error

IVOR14

414

Instruction TLB error

IVOR15

415

Debug

IVOR16–IVOR31

—

Reserved for future architectural use

-Specific IVORs (Defined by the EIS)

IVOR32

528

SPE APU unavailable

IVOR33

529

SPE floating-point data exception

IVOR34

530

SPE floating-point round exception

UM0434 Datasheet(PDF) 167 Page - STMicroelectronics

UM0434 Datasheet(HTML) 167 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL