UM0434 datasheet(256/390 Pages) STMICROELECTRONICS

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UM0434

External core complex interfaces

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Table 181 describes signal debug events to the core.

p_doze

p_nap

p_sleep

Low-power mode. Asserted by the processor to reflect the settings of HID0[DOZE,NAP,SLEEP]

when MSR[WE] is set. The core can be placed in a low-power state by forcing

m_clk to a

quiescent state and brought out of low-power state by re-enabling

m_clk. The time base facilities

may be separately enabled or disabled using combinations of the timer facility control signals.

External logic can detect the asserted edge or level of these signals to determine which low-

power mode has been requested and then place the core and peripherals in a low-power

consumption state.

p_wakeup can be monitored to determine when to end the low-power

condition.

State

Meaning

Asserted—MSR[WE] and the respective HID0 bit are both set.

Negated—MSR[WE] and the respective HID0 bit are not both set.

Timing Assertion—May assert for 1 or more clock cycles.

p_wakeup

Wake up. Used by external logic to remove the core and system logic from a low-power state. It

can also indicate to the system clock controller that

m_clk should be re-enabled for debug

purposes.

p_wakeup (or other system state) should be monitored to determine when to release the

processor (and system if applicable) from a low-power state.

State

Meaning

Asserted—Asserts whenever one of the following occurs:

– A valid pending interrupt is detected by the core.

– A request to enter debug mode is made by setting the OCR[DR] or via the assertion

jd_de_b or p_ude.

– The processor is in a debug session and

jd_debug_b is asserted.

– A request to enable

m_clk has been made by setting OCR[WKUP].

Timing

See

Chapter 9.5.5: Power management on page 289.” This signal is asynchronous to

the system clock and should be synchronized to the system clock domain to avoid

hazards.

Table 180.

Descriptions of power management control signals (continued)

Signal

I/O

Signal description

Table 181.

Descriptions of debug events signals

Signal

I/O

Signal description

p_ude

Unconditional debug event. Used to request an unconditional debug event.

State

Meaning

Asserted—An unconditional debug event has been requested. Only a transition from

negated to asserted state of

p_ude causes an event to occur. However, the level on this

signal causes assertion of

p_wakeup.

Negated—No unconditional debug event has been requested.

Timing

Not internally synchronized by the core, and must meet setup and hold time constraints

relative to

m_clk when the core clock is running.

Assertion—Level-sensitive and must be held asserted until acknowledged by software,

or, when external debug mode is enabled, by assertion of

jd_debug_b to be guaranteed

recognition. Only a transition from negated to asserted state of

p_ude causes an event to

occur. However, the level on this signal causes assertion of

p_wakeup.

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