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UM0434 Datasheet(PDF) 366 Page - STMicroelectronics

Part # UM0434
Description  The primary objective of this user?셲 manual is to describe
PDF  390 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM0434 Datasheet(HTML) 366 Page - STMicroelectronics

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UM0434
Nexus3 module
367/391
Error information is messaged out in the format, shown in
Table 266:
12.9.4
Watchpoint timing diagram (2 MDO/1 MSEO Configuration)
Figure 81.
Watchpoint message and watchpoint error message
12.10
Nexus3 Read/Write access to Memory-Mapped resources
The read/write access feature allows access to memory-mapped resources through the
JTAG/OnCE port. The read/write mechanism supports single as well as block reads and
writes to e200z3 AHB resources.
The Nexus3 module is capable of accessing resources on the e200z3 system bus, AHB,
with multiple configurable priority levels. Memory-mapped registers and other non-cached
memory can be accessed through the standard memory map settings.
All accesses are set up and initiated by the read/write access control/status register, RWCS,
as well as RWA and RWD.
Using RWCS, RWA and RWD, memory-mapped e200z3 AHB resources can be accessed
through Nexus3. The following sections describe the steps that are required to access
memory-mapped resources.
Note:
Read/write access can only access memory-mapped resources when system reset is de-
asserted and clocks are running. Misaligned accesses are not supported in the e200z3
Nexus3 module.
12.10.1
Single write access
Note:
In the first three steps, the registers are initialized using the access method outlined in
Chapter 12.5: Nexus3 register access through JTAG/OnCE on page 348.”
Table 266.
Error message format
(5 bits)
(4 bits)
(6 bits)
Error Code (00110/01000
Source Process
TCODE (001000)
Fixed length = 15 bits
Watchpoint
Error
11
11
00
00
10
00
00
00
10
00
00
10
01
WPM:
TCODE = 15
Source processor = 00
Watchpoint number = 2
Error:
TCODE = 8
Source processor = 00
Error code = 6 (Queue overrun—WPM only)
00
p_mcko
p_mseo_b
p_mdo[1:0]



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