| Electronic Components Datasheet Search |
|
UM0434 Datasheet(PDF) 367 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
UM0434 Datasheet(HTML) 367 Page - STMicroelectronics |
|
367 / 390 page ![]() Nexus3 module UM0434 368/391 1. Initialize RWA using the Nexus register index of 0x9; see Table 216. Configure as shown below: – Write address = 0x nnnn_nnnn (write address) 2. Initialize RWCS using the Nexus register index of 0x7; see Table 216. Configure the fields as shown in Table 267: Note: Access count (CNT) of 0x0000 or 0x0001 performs a single access. 3. Initialize RWD using the Nexus register index of 0xA; see Table 216. Configure as shown below: – Write data = 0x nnnn_nnnn (write data) 4. The Nexus block then arbitrates for the AHB system bus and transfers the data value from the data buffer RWD register to the memory-mapped address in RWA. When the access has completed without error (ERR=0), Nexus asserts the nex_rdy_b signal (see Table 271 for detail on nex_rdy_b) and clears RWCS[DV]. This indicates that the device is ready for the next access. Note: Only the nex_rdy_b signal and the DV and ERR fields within RWCS provide read/write access status to the external development tool. 12.10.2 Block write access (Non-Burst Mode) 1. For a non-burst block write access, follow Steps 1, 2, and 3 outlined in Chapter 12.10.1: Single write access on page 367,” to initialize the registers, but use a value greater than one (0x0001) for RWCS[CNT]. 2. The Nexus block then arbitrates for the AHB system bus and transfers the first data value from the RWD register to the memory-mapped address in RWA. When the transfer has completed without error (ERR = 0), the address from the RWA register is incremented to the next word size (specified in RWCS[SZ]), and the number from the CNT field is decremented. Nexus then asserts the nex_rdy_b pin. This indicates that the device is ready for the next access. 3. Repeat step 3 in Chapter 12.10.1: Single write access on page 367,” until the internal CNT value is zero. When this occurs, RWCS[DV] is cleared to indicate the end of the block write access. Table 267. Single write access field settings Field Setting AC (Access control) 1 (indicates start access) MAP (Map select) 000 (primary memory map) PR (Access priority) 00 (lowest priority) RW (Read/write) 1 (write access) SZ (Word size) 0 nn (32-bit, 16-bit, 8-bit) CNT (Access count) 0x0000 or 0x0001 (single access) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |