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AM3874 Datasheet(PDF) 46 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 46 Page - Texas Instruments |
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46 / 361 page ![]() AM3874, AM3871 SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 www.ti.com Table 3-5. DDR2/DDR3 Memory Controller 1 Terminal Functions (continued) SIGNAL TYPE(1) OTHER(2) (3) DESCRIPTION NAME NO. DDR[1] On-Die Termination for Chip Select 1. IPD/DIS DDR[1]_ODT[1] F11 O The internal pulldown (IPD) is enabled for this pin when the device is DVDD_DDR[1] in reset and the IPD is disabled (DIS) when reset is released. DDR[1] Reset output. IPD/DIS DDR[1]_RST G10 O The internal pulldown (IPD) is enabled for this pin when the device is DVDD_DDR[1] in reset and the IPD is disabled (DIS) when reset is released. IPU/DIS DDR[1]_BA[2] D12 O DVDD_DDR[1] DDR[1] Bank Address outputs IPU/DIS DDR[1]_BA[1] A10 O The internal pullup (IPU) is enabled for these pins when the device is DVDD_DDR[1] in reset and the IPU is disabled (DIS) when reset is released. IPU/DIS DDR[1]_BA[0] F14 O DVDD_DDR[1] IPU/DIS DDR[1]_A[14] D11 O DVDD_DDR[1] IPU/DIS DDR[1]_A[13] E11 O DVDD_DDR[1] IPU/DIS DDR[1]_A[12] B10 O DVDD_DDR[1] IPU/DIS DDR[1]_A[11] A11 O DVDD_DDR[1] IPU/DIS DDR[1]_A[10] F12 O DVDD_DDR[1] IPU/DIS DDR[1]_A[9] C14 O DVDD_DDR[1] IPU/DIS DDR[1]_A[8] E14 O DVDD_DDR[1] DDR[1] Address Bus IPU/DIS DDR[1]_A[7] A9 O The internal pullup (IPU) is enabled for these pins when the device is DVDD_DDR[1] in reset and the IPU is disabled (DIS) when reset is released. IPU/DIS DDR[1]_A[6] D14 O DVDD_DDR[1] IPU/DIS DDR[1]_A[5] B12 O DVDD_DDR[1] IPU/DIS DDR[1]_A[4] B14 O DVDD_DDR[1] IPU/DIS DDR[1]_A[3] A14 O DVDD_DDR[1] IPU/DIS DDR[1]_A[2] C11 O DVDD_DDR[1] IPU/DIS DDR[1]_A[1] F10 O DVDD_DDR[1] IPU/DIS DDR[1]_A[0] B11 O DVDD_DDR[1] 46 Device Pins Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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