AM3874 datasheet(13/361 Pages) TI

13 / 361 page

Arbiter

128

ICECrusher

Trace

Debug

48KB ROM

64KB RAM

ARM Cortex-A8

Interrupt Controller

(AINTC)

DMM

128

128 128

PLL_ARM

128

System Events

128

ARM Cortex-A8

NEON

ETM

512KB L2$

32KB L1I$ 32KB L1D$

DEVOSC

AM3874, AM3871

www.ti.com

SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013

2.3

Device Compatibility

2.4

ARM® Cortex™-A8 Microprocessor Unit (MPU) Subsystem Overview

The ARM® Cortex™-A8 Subsystem is designed to give the ARM Cortex-A8 Master control of the device.

In general, the ARM Cortex-A8 is responsible for configuration and control of the various subsystems,

peripherals, and external memories.

The ARM Cortex-A8 Subsystem includes the following features:

•

ARM Cortex-A8 RISC processor:

–

ARMv7 ISA plus Thumb2™, JazelleX™, and Media Extensions

–

Neon™ Floating-Point Unit

–

Enhanced Memory Management Unit (MMU)

–

Little Endian

–

32KB L1 Instruction Cache

–

32KB L1 Data Cache

–

512KB L2 Cache

•

CoreSight Embedded Trace Module (ETM)

•

ARM Cortex-A8 Interrupt Controller (AINTC)

•

Embedded PLL Controller (PLL_ARM)

•

64KB Internal RAM

•

48KB Internal Public ROM

Figure 2-1 shows the ARM Cortex-A8 Subsystem for the device.

Figure 2-1. ARM Cortex-A8 Subsystem

For more details on the ARM Cortex-A8 Subsystem, see the System MMU section of the Chip Level

Resources chapter of the AM387x Sitara™ ARM Processors Technical Reference Manual (Literature

Number: SPRUGZ7).

2.4.1

ARM Cortex-A8 RISC Processor

The ARM Cortex-A8 Subsystem integrates the ARM Cortex-A8 processor. The ARM Cortex-A8 processor

is a member of ARM Cortex family of general-purpose microprocessors. This processor is targeted at

multi-tasking applications where full memory management, high performance, low die size, and low power

are all important. The ARM Cortex-A8 processor supports the ARM debug architecture and includes logic

to assist in both hardware and software debug. The ARM Cortex-A8 processor has a Harvard architecture

and provides a complete high-performance subsystem, including:

•

ARM Cortex-A8 Integer Core

•

Superscalar ARMv7 Instruction Set

Device Overview

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