AM3874 datasheet(2/361 Pages) TI

2 / 361 page

AM3874, AM3871

SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013

www.ti.com

Optional Switch

– Quad Four Serializer Transmit and Receive

Ports

– IEEE 802.3 Compliant (3.3-V I/O Only)

– DIT-Capable For S/PDIF (All Ports)

– MII/RMII/GMII/RGMII Media Independent

Interfaces

• Multichannel Buffered Serial Port (McBSP)

– Management Data I/O (MDIO) Module

– Transmit and Receive Clocks up to 48 MHz

– Reset Isolation

– Two Clock Zones and Two Serial Data Pins

– IEEE 1588 Time-Stamping and Industrial

– Supports TDM, I2S, and Similar Formats

Ethernet Protocols

• Serial ATA (SATA) 3.0 Gbps Controller With

• Dual USB 2.0 Ports With Integrated PHYs

Integrated PHY

– USB2.0 High- and Full-Speed Clients

– Direct Interface to One Hard Disk Drive

– USB2.0 High-, Full-, and Low-Speed Hosts,

– Hardware-Assisted Native Command

or OTG

Queuing (NCQ) from up to 32 Entries

– Supports End Points 0–15

– Supports Port Multiplier and Command-

Based Switching

• One PCI Express 2.0 Port With Integrated PHY

• Real-Time Clock (RTC)

– Single Port With One Lane at 5.0 GT/s

– One-Time or Periodic Interrupt Generation

– Configurable as Root Complex or Endpoint

• Up to 128 General-Purpose I/O (GPIO) Pins

• Eight 32-Bit General-Purpose Timers

(Timer1–8)

• One Spin Lock Module with up to 128 Hardware

Semaphores

• One System Watchdog Timer (WDT0)

• One Mailbox Module with 12 Mailboxes

• Six Configurable UART/IrDA/CIR Modules

• On-Chip ARM ROM Bootloader (RBL)

– UART0 With Modem Control Signals

• Power, Reset, and Clock Management

– Supports up to 3.6864 Mbps UART0/1/2

– Multiple Independent Core Power Domains

– Supports up to 12 Mbps UART3/4/5

– Multiple Independent Core Voltage Domains

– SIR, MIR, FIR (4.0 MBAUD), and CIR

– Support for Three Operating Points (OPP100,

• Four Serial Peripheral Interfaces (SPIs) (up to

OPP120, OPP166) per Voltage Domain

48 MHz)

– Clock Enable and Disable Control for

– Each With Four Chip Selects

Subsystems and Peripherals

• Three MMC/SD/SDIO Serial Interfaces (up to

• 32KB of Embedded Trace Buffer (ETB) and

48 MHz)

5-Pin Trace Interface for Debug

– Three Supporting up to 1-, 4-, or 8-Bit Modes

• IEEE 1149.1 (JTAG) Compatible

• Dual Controller Area Network (DCAN) Modules

• 684-Pin Pb-Free BGA Package (CYE Suffix),

– CAN Version 2 Part A, B

0.8-mm Ball Pitch With Via Channel

• Four Inter-Integrated Circuit (I2C Bus) Ports

Technology to Reduce PCB Cost

• Six Multichannel Audio Serial Ports (McASPs)

• 45-nm CMOS Technology

– Dual Ten Serializer Transmit and Receive

• 1.8- and 3.3-V Dual Voltage Buffers for General

Ports

I/O

1.2

Applications

•

Single Board Computing

•

Network and Communications Processing

•

Industrial Automation

•

Human Machine Interface

•

Interactive Point-of-Service and Information Kiosks

•

Portable Data Terminals

High-Performance System-on-Chip (SoC)

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Product Folder Links: AM3874 AM3871

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