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AM3874 Datasheet(PDF) 23 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 361 page  AM3874, AM3871 www.ti.com SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 Cortex-A8 and L3 Masters SIZE DEVICE NAME START ADDRESS END ADDRESS (HEX) (HEX) 0x4819_D000 0x4819_DFFF 4KB I2C2 Support Registers 0x4819_E000 0x4819_EFFF 4KB I2C3 Peripheral Registers 0x4819_F000 0x4819_FFFF 4KB I2C3 Support Registers 0x481A_0000 0x481A_0FFF 4KB SPI1 Peripheral Registers 0x481A_1000 0x481A_1FFF 4KB SPI1 Support Registers 0x481A_2000 0x481A_2FFF 4KB SPI2 Peripheral Registers 0x481A_3000 0x481A_3FFF 4KB SPI2 Support Registers 0x481A_4000 0x481A_4FFF 4KB SPI3 Peripheral Registers 0x481A_5000 0x481A_5FFF 4KB SPI3 Support Registers 0x481A_6000 0x481A_6FFF 4KB UART3 Peripheral Registers 0x481A_7000 0x481A_7FFF 4KB UART3 Support Registers 0x481A_8000 0x481A_8FFF 4KB UART4 Peripheral Registers 0x481A_9000 0x481A_9FFF 4KB UART4 Support Registers 0x481A_A000 0x481A_AFFF 4KB UART5 Peripheral Registers 0x481A_B000 0x481A_BFFF 4KB UART5 Support Registers 0x481A_C000 0x481A_CFFF 4KB GPIO2 Peripheral Registers 0x481A_D000 0x481A_DFFF 4KB GPIO2 Support Registers 0x481A_E000 0x481A_EFFF 4KB GPIO3 Peripheral Registers 0x481A_F000 0x481A_FFFF 4KB GPIO3 Support Registers 0x481B_0000 0x481B_FFFF 64KB Reserved 0x481C_0000 0x481C_0FFF 4KB Reserved 0x481C_1000 0x481C_1FFF 4KB TIMER8 Peripheral Registers 0x481C_2000 0x481C_2FFF 4KB TIMER8 Support Registers 0x481C_3000 0x481C_3FFF 4KB SYNCTIMER32K Peripheral Registers 0x481C_4000 0x481C_4FFF 4KB SYNCTIMER32K Support Registers 0x481C_5000 0x481C_5FFF 4KB PLLSS Peripheral Registers 0x481C_6000 0x481C_6FFF 4KB PLLSS 0x481C_7000 0x481C_7FFF 4KB WDT0 Peripheral Registers 0x481C_8000 0x481C_8FFF 4KB WDT0 Support Registers 0x481C_9000 0x481C_9FFF 8KB Reserved 0x481C_A000 0x481C_BFFF 8KB Reserved 0x481C_C000 0x481C_DFFF 8KB DCAN0 Peripheral Registers 0x481C_E000 0x481C_FFFF 8KB DCAN0 Support Registers 0x481D_0000 0x481D_1FFF 8KB DCAN1 Peripheral Registers 0x481D_2000 0x481D_3FFF 8KB DCAN1 Support Registers 0x481D_4000 0x481D_5FFF 8KB Reserved 0x481D_6000 0x481D_6FFF 4KB Reserved 0x481D_7000 0x481D_7FFF 4KB Reserved 0x481D_8000 0x481E_7FFF 64KB MMC/SD/SDIO1 Peripheral Registers 0x481E_8000 0x481E_8FFF 4KB MMC/SD/SDIO1 Support Registers 0x481E_9000 0x481F_FFFF 52KB Reserved 0x4820_0000 0x4820_0FFF 4KB Interrupt controller(1) 0x4820_1000 0x4823_FFFF 252KB Reserved(1) 0x4824_0000 0x4824_0FFF 4KB MPUSS config register(1) 0x4824_1000 0x4827_FFFF 252KB Reserved(1) (1) These regions decoded internally by the Cortex™-A8 Subsystem and are not physically part of the L4 Slow. They are included here only for reference when considering the Cortex™-A8 Memory Map. For Masters other than the Cortex-A8 these regions are reserved. Copyright © 2011–2013, Texas Instruments Incorporated Device Overview 23 Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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