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AM3874 Datasheet(PDF) 250 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 250 Page - Texas Instruments |
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250 / 361 page ![]() AM3874, AM3871 SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 www.ti.com Table 8-36. Timing Requirements for GPMC/NOR Flash Interface - Asynchronous Mode(1) (see Figure 8-27, Figure 8-28 for Non-Multiplexed Mode ) (see Figure 8-29, Figure 8-31 for Multiplexed Mode) OPP100/120/166 NO. UNIT MIN MAX 6 tacc(DAT) Data maximum access time (GPMC_FCLK cycles) H(2) cycles Page mode successive data maximum access time (GPMC_FCLK 21 tacc1-pgmode(DAT) P(3) cycles cycles) 22 tacc2-pgmode(DAT) Page mode first data maximum access time (GPMC_FCLK cycles) H(2) cycles (1) The internal GPMC_FCLK is equal to SYSCLK6, and is nominally 100 MHz or 10 ns. For any additional constraints, see the Clocking section of this document. (2) H = AccessTime * (TimeParaGranularity + 1) (3) P = PageBurstAccessTime * (TimeParaGranularity + 1). Table 8-37. Switching Characteristics Over Recommended Operating Conditions for GPMC/NOR Flash Interface - Asynchronous Mode (see Figure 8-27, Figure 8-28, Figure 8-29, Figure 8-30 for Non-Multiplexed Modes) (see Figure 8-31, Figure 8-32 for Multiplexed Modes) OPP100/120/166 NO PARAMETER UNIT . MIN MAX 1 tw(nBEV) Pulse duration, GPMC_BE0_CLE, GPMC_BE1 valid time N(1) ns 2 tw(nCSV) Pulse duration, GPMC_CS[x] low A(2) ns 4 td(nCSV-nADVIV) Delay time, GPMC_CS[x] valid to GPMC_NADV_ALE invalid B - 2(3) B + 4(3) ns 5 td(nCSV-nOEIV) Delay time, GPMC_CS[x] valid to GPMC_OE_RE invalid (single read) C - 2(4) C + 4(4) ns MUX0 and Non-Multi J - 2(5) J + 4(5) ns Muxed pins Delay time, GPMC_A[27:0] address bus valid to MUX1 for 10 td(AV-nCSV) J - 2(5) J + 4(5) ns GPMC_CS[x] valid GPMC_A[15:0] MUX1/2 for J - 2(5) J + 4(5) ns GPMC_A[27:20] 11 td(nBEV-nCSV) Delay time, GPMC_BE0_CLE, GPMC_BE1 valid to GPMC_CS[x] valid J - 2(5) J + 4(5) ns 13 td(nCSV-nADVV) Delay time, GPMC_CS[x] valid to GPMC_ADV_ALE valid K - 2(6) K + 4(6) ns 14 td(nCSV-nOEV) Delay time, GPMC_CS[x] valid to GPMC_OE_RE valid L - 2(7) L + 4(7) ns (1) For single read: N = RdCycleTime * (TimeParaGranularity + 1) * GPMC_FCLK For single write: N = WrCycleTime * (TimeParaGranularity + 1) * GPMC_FCLK For burst read: N = (RdCycleTime + (n - 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK For burst write: N = (WrCycleTime + (n - 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK (2) For single read: A = (CSRdOffTime - CSOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK For single write: A = (CSWrOffTime - CSOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK For burst read: A = (CSRdOffTime - CSOnTime + (n - 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK For burst write: A = (CSWrOffTime - CSOnTime + (n - 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK (3) = B - nCS Max Delay + nADV Min Delay For reading: B = ((ADVRdOffTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (ADVExtraDelay - CSExtraDelay)) * GPMC_FCLK For writing: B = ((ADVWrOffTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (ADVExtraDelay - CSExtraDelay)) * GPMC_FCLK (4) = C - nCS Max Delay + nOE Min Delay C = ((OEOffTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (OEExtraDelay - CSExtraDelay)) * GPMC_FCLK (5) = J - Address Max Delay + nCS Min Delay J = (CSOnTime * (TimeParaGranularity + 1) + 0.5 * CSExtraDelay) * GPMC_FCLK (6) = K - nCS Max Delay + nADV Min Delay K = ((ADVOnTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (ADVExtraDelay - CSExtraDelay)) * GPMC_FCLK (7) = L - nCS Max Delay + nOE Min Delay L = ((OEOnTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (OEExtraDelay - CSExtraDelay)) * GPMC_FCLK 250 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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