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ADP5080 Datasheet(PDF) 40 Page - Analog Devices |
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ADP5080 Datasheet(HTML) 40 Page - Analog Devices |
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40 / 64 page  ADP5080 Data Sheet CONTROL REGISTER INFORMATION CONTROL REGISTER MAP Table 15 lists all control registers for the ADP5080. Any bits shown as blank are reserved. Table 15. Control Register Map Register Address Register Name Reg. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0x00 Reserved Reserved 1 0x01 DSCG DSCG7_ON DSCG6_ON DSCG5_ON DSCG4_ON DSCG3_ON DSCG2_ON DSCG1_ON 2 0x02 SFTTIM1234 SS4[1:0] SS3[1:0] SS2[1:0] SS1[1:0] 3 0x03 SFTTIM567 SS7 SS6[1:0] SS5[1:0] 4 0x04 EN_DLY12 EN_DLY2[2:0] EN_DLY1[2:0] 5 0x05 EN_DLY34 EN_DLY4[2:0] EN_DLY3[2:0] 6 0x06 EN_DLY56 EN_DLY6[2:0] EN_DLY5[2:0] 7 0x07 EN_DLY7 EN_DLY7[2:0] 8 0x08 DIS_DLY12 DIS_DLY2[2:0] DIS_DLY1[2:0] 9 0x09 DIS_DLY34 DIS_DLY4[2:0] DIS_DLY3[2:0] 10 0x0A DIS_DLY56 DIS_DLY6[2:0] DIS_DLY5[2:0] 11 0x0B DIS_DLY7 DIS_DLY7[2:0] 12 0x0C VID1 VID1[4:0] 13 0x0D VID23 VID3[2:0] VID2[3:0] 14 0x0E VID45 VID5[2:0] VID4[2:0] 15 0x0F VID6 VID6[3:0] 16 0x10 VID7_LDO12 VID_LDO2[1:0] VID_LDO1 VID7[1:0] 17 0x11 DVS12 DVS2_INTVL DVS1_INTVL EN_DVS2 EN_DVS1 18 0x12 SEL_FREQ SEL_FSW FREQ6 FREQ5 FREQ4 FREQ3 FREQ2 FREQ1 19 0x13 SEL_FREQ_CP EN_CLKO FREQ_CP[1:0] 20 0x14 SEL_PHASE PHASE6 PHASE5 PHASE4 PHASE3 PHASE2 PHASE1 23 0x17 PROT_DLY UV_DLY[1:0] OV_DLY[1:0] 24 0x18 PWRG EN PWRG7 PWRG6 PWRG5 PWRG4 PWRG3 PWRG2 PWRG1 25 0x19 MASK_PWRG MASK_ PWRG7 MASK_ PWRG6 MASK_ PWRG5 MASK_ PWRG4 MASK_ PWRG3 MASK_ PWRG2 MASK_ PWRG1 26 0x1A UVPST UV7 UV6 UV5 UV4 UV3 UV2 UV1 27 0x1B OVPST OV6 OV5 OV4 OV3 OV2 OV1 28 0x1C AUTO-PSM AUTO-PSM6 AUTO-PSM5 AUTO-PSM4 AUTO-PSM3 AUTO-PSM2 AUTO-PSM1 29 0x1D SEQ_MODE MODE_EN7 MODE_EN6 MODE_EN5 MODE_EN4 MODE_EN3 MODE_EN2 MODE_EN1 30 0x1E ADJ_BST_VTH6 BUCK6_ONLY BOOST6_VTH[1:0] 31 0x1F OPT_SR_ADJ ADJ_SR6 ADJ_SR5 ADJ_SR4 ADJ_SR3 ADJ_SR2 ADJ_SR1 32 0x20 DCM56_GSCAL1 DCM56 GATE_SCAL1 33 0x21 SEL_INP_LDO12 SEL_INP_ LDO2 SEL_INP_ LDO1 34 0x22 SEL_IND_UV5 UV_DLY5[1:0] SEL_IND_ UV5 35 0x23 OPTION_SEL REDUCE_ VOUT1 DIS_DLY_ EXTEND DIS_EN34_ CH4 DIS_EN34_ CH3 48 0x30 PCTRL RDST_PCTRL CH7_ON CH6_ON CH5_ON CH4_ON CH3_ON CH2_ON CH1_ON Rev. A | Page 40 of 64 |
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