| Electronic Components Datasheet Search |
|
ADP5080 Datasheet(PDF) 22 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP5080 Datasheet(HTML) 22 Page - Analog Devices |
|
22 / 64 page ![]() ADP5080 Data Sheet DC-TO-DC CONVERTER CHANNELS The ADP5080 integrates five buck regulators and a configurable buck only/buck boost regulator. These regulators can be configured for various functions including auto PSM, auto DCM, DVS, and gate scaling. Each function is included only in the channels where it is most effective (see Table 9). Channel 1, Channel 2, and Channel 3: Buck Regulators with Flex-Mode Architecture Channel 1, Channel 2, and Channel 3 feature Flex-Mode™ current mode control, which eliminates minimum on time requirements and allows duty cycles as low as 0%. Flex-Mode uses a unique adaptive control architecture that maintains stable operation over a wide range of application conditions. With Flex-Mode control, very high step-down ratios can be achieved while maintaining high efficiency and excellent transient performance. Selecting the Output Voltage, Channel 1 to Channel 3 The output voltage of Channel 1, Channel 2, or Channel 3 is selected from one of the preset values available in the VIDx bits, where x is 1, 2, or 3 (see Table 39 and Table 41). The default output voltage value is factory fuse programmed. Channel 3 has an adjustable mode option that can be selected using the VID3 bits. When the adjustable output voltage mode is selected, the output voltage is set by an external feedback resistor divider. Select resistor values such that the desired output voltage is divided down to 0.8 V and the paralleled resistance seen from the dividing node does not exceed 25 kΩ (see the Setting the Output Voltage (Adjustable Mode Channels) section). Channel 1 can also be used in adjustable output mode by setting the VID1 bits to 0.8 V and using external feedback resistors with values less than 1 kΩ. When using the adjustable mode for Channel 1 or Channel 3, be aware of the minimum off time restriction, which may limit the range of available output voltages. Channel 1, Channel 2, and Channel 3 are designed for very low duty cycle operation. However, at very high duty cycle, these chan- nels have a limited range due to the minimum off time restriction (see Table 3). The minimum input voltage capability for a given output voltage can be determined using the following equation: VIN_MIN = VOUT/(1 − tOFF_MIN × fSW) If the input voltage falls below this level, the output voltage droops below its nominal value. Current-Limit Protection, Channel 1 to Channel 3 Channel 1, Channel 2, and Channel 3 use valley mode current limit (see Figure 38). In valley mode current-limit protection, inductor current is sensed during the low-side on cycle, imme- diately before the high-side FET turns on. If the inductor current is above the current-limit threshold at this point, the next switching pulse is skipped. Figure 38. Valley Mode Current Limit Switching does not resume until the current falls below the limit threshold. This behavior creates an inherent frequency foldback feature, which makes valley mode current-limit protection very robust against runaway inductor current. Because this type of current limit senses current before switching, it is also relatively immune to switching noise. Table 3 provides the valley current threshold specifications. The actual load current-limit threshold varies with inductor value, frequency, and input and output voltage. When the current-limit threshold is exceeded, load current is not allowed to increase further. Therefore, as the load impedance is reduced, the current limit forces the output voltage to fall. The falling output voltage in turn toggles the PWRGx, UVx, and FAULT error flags. In the extreme event of an output voltage short circuit, the UVP function protects the device against excessive current during the on cycle (see the Undervoltage Protection (UVP) section). Table 9. DC-to-DC Converter Specifications and Functions Channel Regulator Type VIN Range (V) VOUT Range (V) Adjustable Mode (V) IOUT (A) Auto PSM Auto DCM DVS Gate Scaling 1 Buck 4 to 15 0.8 to 1.21 0.8 to 1.2 3 Yes N/A Yes Yes 2 Buck 4 to 15 1.0 to 3.3 N/A 1.15 Yes N/A Yes N/A 3 Buck 4 to 15 1.2 to 1.8 0.8 to 3.6 1.5 Yes N/A N/A N/A 4 Buck 4 to 15 1.8 to 3.55 1.0 to 5.0 0.8 Yes N/A N/A N/A 5 Buck 4 to 15 3.0 to 5.0 N/A 2 Yes Yes N/A N/A 6 Buck or buck boost 4 to 15 3.5 to 5.5 1.0 to 5.0 2 (buck) 1.5 (buck boost) Yes Yes N/A N/A 1 Channel 1 has two available voltage ranges. VALLEY CURRENT- LIMIT THRESHOLD SW NODE INDUCTOR CURRENT CURRENT SENSING POINT SKIPPED CYCLE Rev. A | Page 22 of 64 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |