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ADP5080 Datasheet(PDF) 3 Page - Analog Devices |
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ADP5080 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 64 page  Data Sheet ADP5080 SPECIFICATIONS TJ = 25°C, VVBATT = 7.2 V, VVREG1 = VVDRx = 5 V, VVREG2 = VVDDIO = 3.3 V, unless otherwise noted. Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments INPUT SUPPLY VOLTAGE RANGE VBATT VVBATT 4.0 15 V Applies to PVIN1, PVIN2, PVIN3, PVIN4, PVIN5, and PVIN6 VILDO7 VVILDO7 5 25 V VDDIO VVDDIO 1.6 3.6 V QUIESCENT CURRENT Operating Quiescent Current IQ (VIN) 8 11 mA All channels on, nonswitching VDDIO IQ (VDDIO_OP) 0.2 µA VVDDIO = VSCL = VSDA = 3.3 V Standby Current IQ(VBATT_STNBY1) 12 20 µA Includes LDO1 and LDO2, EN low IQ(VBATT_STNBY2) 1.25 mA All channels off, EN high, SEL_FSW = 1, FREQ_CP = 01 UNDERVOLTAGE LOCKOUT UVLO UVLO Rising Threshold VUVLO (R) 3.45 3.7 3.85 V At PVIN1 UVLO Falling Threshold VUVLO (F) 3.45 3.55 V At PVIN1 VBATT UVLO Threshold VUVLO (BATT) 3.3 V At VBATT, falling Reset Threshold VUVLO (POR) 2.4 V At VREG2, falling OSCILLATOR CIRCUIT Switching Frequency fSW 1.98 2.0 2.02 MHz ROSC = 100 kΩ, SEL_FSW = 0 1.48 1.5 1.52 MHz ROSC = 100 kΩ, SEL_FSW = 1 SYNC Pin, Input Clock Frequency Range fSYNC 0.5 2.0 MHz ROSC = 100 kΩ Minimum On Pulse Width tSYNC_MIN_ON 100 ns Minimum Off Pulse Width tSYNC_MIN_OFF 100 ns High Logic VH (SYNC) 0.8 × VVREG2 V VVREG2 = 3.3 V, −25°C ≤ TJ ≤ +85°C Low Logic VL (SYNC) 0.3 × VVREG2 V VVREG2 = 3.3 V, −25°C ≤ TJ ≤ +85°C LOGIC INPUTS EN Pin High Level Threshold VIH (EN) 2.15 V VVREG2 = 3.3 V, −25°C ≤ TJ ≤ +85°C Low Level Threshold VIL (EN) 1.45 V VVREG2 = 3.3 V, −25°C ≤ TJ ≤ +85°C EN34 Pin High Level Threshold VIH (EN34) 1.25 V VVREG2 = 3.3 V, −25°C ≤ TJ ≤ +85°C Low Level Threshold VIL (EN34) 0.70 V VVREG2 = 3.3 V, −25°C ≤ TJ ≤ +85°C SCL and SDA Pins High Level Threshold VIH (I2C) 0.75 × VVDDIO V VVDDIO = 3.3 V, −25°C ≤ TJ ≤ +85°C Low Level Threshold VIL (I2C) 0.3 × VVDDIO V VVDDIO = 3.3 V, −25°C ≤ TJ ≤ +85°C LOGIC OUTPUTS SDA Pin Low Level Output Voltage VOL (SDA) 0.4 V 3.0 mA sink current, −25°C ≤ TJ ≤ +85°C Leakage Current ILEAK (SDA) 10 nA VSDA = 3.3 V CLKO Pin High Level Output Voltage VOH (CLKO) VVREG2 − 0.4 V 3.0 mA sink current, −25°C ≤ TJ ≤ +85°C Low Level Output Voltage VOL (CLKO) 0.4 V 3.0 mA sink current, −25°C ≤ TJ ≤ +85°C FAULT Pin Low Level Output Voltage VOL ( FAULT) 0.4 V 3.0 mA source current, −25°C ≤ TJ ≤ +85°C Leakage Current ILEAK ( FAULT) 10 nA V FAULT = 3.3 V Rev. A | Page 3 of 64 |
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