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GS1671 Datasheet(PDF) 9 Page - Semtech Corporation |
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GS1671 Datasheet(HTML) 9 Page - Semtech Corporation |
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9 / 130 page ![]() GS1671 HD/SD SDI Integrated Receiver Data Sheet 53737 - 2 September 2012 9 of 130 A5, A6, B5, B6, C5, C6 STAT[0:5] Output MULTI-FUNCTIONAL OUTPUT PORT. Please refer to the Output Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Each of the STAT [0:5] pins can be configured individually to output one of the following signals: Signal H/HSYNC V/VSYNC F/DE LOCKED Y/1ANC C/2ANC DATA ERROR VIDEO ERROR AUDIO ERROR EDH DETECTED CARRIER DETECT RATE_DET Default STAT0 STAT1 STAT2 STAT3 STAT4 − STAT5 − − − − − A7, D10, G10, K7 IO_VDD Input Power POWER connection for digital I/O. Connect to 3.3V or 1.8V DC digital. A8 PCLK Output PARALLEL DATA BUS CLOCK Please refer to the Output Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. HD 10-bit modePCLK @ 148.5 or 148.5/1.001MHz HD 20-bit modePCLK @ 74.25 or 74.25/1.001MHz SD 10-bit modePCLK @ 27MHz SD 20-bit modePCLK @ 13.5MHz Table 1-1: Pin Descriptions (Continued) Pin Number Name Timing Type Description |
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