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Z80 Datasheet(PDF) 111 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 111 Page - Zilog, Inc. |
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111 / 330 page  < %27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access Figure 39. Write-Register Pointing Methods Write Register 0 Group The WR0 base register byte is identified by a 0 in bit 7 and any combi- nation except 0, 0 in bits 0 and 1 (Figure 40). It sets the following condi- tions. Class of Operation Bits 1 and 0 used together set the class of operation as sequential transfer (0,1), search only (1,0), or sequential/transfer/search (1,1). Simultaneous transfers or transfer/searches are obtained by selecting the search-only class (1,0) and by allowing the external hardware to generate the appro- priate bus control signals for the complete transfer (see the chapter “Applications”). D7 D6 D5 D4 D3 D2 D1 D0 Base Register Associated Register #1 Associated Register #2 Associated Register #3 Associated Register #4 Pointer Bits |
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