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Z80 Datasheet(PDF) 168 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 168 Page - Zilog, Inc. |
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168 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access Continuous Mode Continuous Mode monopolizes the bus until the end-of-block or byte match is reached, regardless of the state of the Ready line. While achieving the fastest transfer speeds, this mode is employed when no time-critical functions are dependent upon the CPU or when the data blocks are relatively short. Byte mode is used for most applications. When considering the use of Burst or Continuous modes, the following must be known: • Maximum block length • Maximum DMA transfer rate (see Table 8) • Maximum time Ready line remains active The DMA can be forced off the bus in either Byte or Burst mode. Figure 58 illustrates how an external gate is used to remove the RDY- input state from the DMA. Forcing the DMA to stop in the middle of a transfer cannot be used when the DMA is operating in Continuous mode. Only a power-down or normal termination with end-of-block or byte match can make the DMA release the bus. Figure 58. DMA Bus-Master Gate (Byte or Burst Modes Only) Control Overhead The CPU becomes less efficient when the DMA’s software must be initialized or updated. As Table 15 illustrates, thirty-five control bytes are required to initialize a fully functioning DMA. In addition, using the Interrupt mode requires servicing by the CPU, which demands writing additional control bytes to the DMA. User Supplied RDY To DMA FORCE.OFF.BUS |
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