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Z80 Datasheet(PDF) 202 Page - Zilog, Inc.

Part # Z80
Description  Z80 CPU PERIPHERALS
PDF  330 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z80 Datasheet(HTML) 202 Page - Zilog, Inc.

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Parallel Input/Output

IEI
Interrupt Enable In (input, active High). This signal is used to form a
priority interrupt daisy-chain when more than one interrupt driven device is
being used. A high level on this pin indicates that no other devices of higher
priority are being serviced by a CPU interrupt service routine.
IEO
Interrupt Enable Out (output, active High). The IEO signal is the other
signal required to form a daisy-chain priority scheme. It is High only if IEI
is High and the CPU is not servicing an interrupt from this PIO. Thus, this
signal blocks lower priority devices from interrupting while a higher
priority device is being serviced by its CPU interrupt service routine.
INT
Interrupt Request (output, open-drain, active Low). When INT is active,
the Z80 PIO is requesting an interrupt from the Z80 CPU.
A7-A0
Port A Bus (bidirectional, tristate). This 8-bit bus is used to transfer data
and/or status or control information between Port A of the Z80 PIO and a
peripheral device. A0 is the least-significant bit of the Port A data bus.
ASTB
Port A Strobe Pulse from Peripheral Device (input, active Low). The
meaning of this signal depends on the mode of operation selected for Port A
as follows:
1. Output mode: The positive edge of this strobe is issued by the peripheral
to acknowledge the receipt of data made available by the PIO.
2. Input mode: The strobe is issued by the peripheral to load data from
the peripheral into the Port A input register. Data is loaded into the
PIO when this signal is active.



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