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Z80 Datasheet(PDF) 203 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 203 Page - Zilog, Inc. |
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203 / 330 page  < %27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Parallel Input/Output 3. Bidirectional mode: When this signal is active, data from the Port A output register is gated onto Port A bidirectional data bus. The positive edge of the strobe acknowledges the receipt of the data. 4. Control mode: The strobe is inhibited internally. ARDY Register A Ready (output, active High). The meaning of this signal depends on the mode of operation selected for Port A as follows: 1. Output mode: This signal goes active to indicate that the Port A output register has been loaded and the peripheral data bus is stable and ready for transfer to the peripheral device. 2. Input mode: This signal is active when the Port A input register is empty and is ready to accept data from the peripheral device. 3. Bidirectional mode: This signal is active when data is available in the Port A output register for transfer to the peripheral device. In this mode, data is not placed on the Port A data bus unless ASTB is active. 4. Control mode: This signal is disabled and forced to a Low state. B7-B0 Port B Bus (bidirectional, tristate). This 8-bit bus is used to transfer data and/or status or control information between Port B of the PIO and a peripheral device. The Port B data bus is capable of supplying 1.5 mA @ 1.5V to drive Darlington transistors. B0 is the least significant bit of the bus. BSTB Port B Strobe Pulse from Peripheral Device (input, active Low). The meaning of this signal is similar to that of ASTB with the following exception: In the Port A bidirectional mode, this signal strobes data from the peripheral device into the Port A input register. |
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