Z80 datasheet(258/330 Pages) ZILOG

258 / 330 page

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UM008101-0601

Serial Input/Output

238

character received is loaded into the buffer; the character preceding it is

lost. When the character that has been written over the other characters is

read, the Receive Overrun bit is set and the Special Receive. Condition

vector is returned if Status Affects Vector is enabled.

In a polled environment, the Receive Character Available bit (RR0, D0)

must be monitored so that the Z80 CPU knows when to read a character.

This bit is automatically reset when the receive buffers are read. To prevent

overwriting data in polled operations, the transmit buffer status must be

cheeked before writing to the transmitter. The Transmit Buffer Empty bit is

set to 1 whenever the transmit buffer is empty.

SYNCHRONOUS OPERATION

Overview

Before describing synchronous transmission and reception, the three types

of character synchronization, Monosync, Bisync, and External Sync,

require explanation. These modes use the x1 clock for both Transmit and

Receive operations. Data is sampled on the rising edge of the Receive

Clock input (RxC). Transmitter data transitions occur on the falling edge of

the Transmit Clock input (TxC).

The differences between Monosync, Bisync, and External Sync are in the

form in which initial character synchronization is achieved. The mode of

operation must be selected before sync characters are loaded, because the

registers are used differently in the various modes. Figure 112 depicts the

formats for all three of these synchronous modes.

Z80 Datasheet(PDF) 258 Page - Zilog, Inc.