Z80 datasheet(256/330 Pages) ZILOG

256 / 330 page

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UM008101-0601

Serial Input/Output

236

used. If parity is enabled, the parity bit is not stripped from the assembled

character for character lengths other than eight bits. For lengths other than

eight bits, the receiver assembles a character length of the required

number of data bits, plus a parity bit and Is for any unused bits. For

example, the receiver assembles a 5-bit character with the following

format: 11 P D4 D3 D2 D1 D0.

Because the receiver is buffered by three 8-bit registers in addition to the

receive shift register, the CPU has enough time to service an interrupt and

to accept the data character assembled by the Z80 SIO. The receiver also

has three buffers that store error flags for each data character in the receive

buffer. These error flags are loaded at the same time as the data characters.

After a character is received, it is checked for the following error conditions:

• When parity is enabled, the Parity Error bit (RR1, D4) is set whenever

the parity bit of the character does not match with the programmed

parity. Once this bit is set, it remains set until the Error Reset Command

(WR0) is given.

• The Framing Error bit (RR1, D6) is set if the character is assembled

without any stop bits (that is, a Low level detected for a stop bit).

Unlike the Parity Error bit, this bit is set (and not latched) only for the

character on which it occurred. Detection of framing error adds an

additional one-half of a bit time to the character time so the framing

error is not interpreted as a new start bit.

• If the CPU fails to read a data character while more than three

characters have been received, the Receive Overrun bit RR1 D5) is set.

When this occurs, the fourth character assembled replaces the third

character in the receive buffers. With this arrangement, only the

character that has been written over is flagged with the Receive Overrun

Error bit. Like Parity Error, this bit can only be reset by the Error Reset

command from the CPU. Both the Framing Error and Receive Overrun

Error cause an interrupt with the interrupt vector indicating a Special

Receive condition (if Status Affects Vector is selected).

Z80 Datasheet(PDF) 256 Page - Zilog, Inc.