| Electronic Components Datasheet Search |
|
PC87382 Datasheet(PDF) 39 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87382 Datasheet(HTML) 39 Page - National Semiconductor (TI) |
|
39 / 72 page ![]() 5.0 General-Purpose Input/Output (GPIO) Port (Continued) Revision 1.2 39 www.national.com 5.2 BASIC FUNCTIONALITY The basic functionality of each GPIO pin is based on four configuration bits and a bit slice of runtime registers GPDO and GPDI. The configuration and operation of a single GPIOXn pin (pin n in port X) is shown in Figure 9. Figure 9. GPIO Basic Functionality 5.2.1 Configuration Options The GPCFG register controls the following basic configuration options: • Port Direction - Controlled by the Output Enable bit (bit 0). • Output Type - Push-pull vs. open-drain. It is controlled by Output Buffer Type (bit 1) by enabling/disabling the pull-up portion of the output buffer. • Weak Static Pull-Up - May be added to any type of port (input, open-drain or push-pull). It is controlled by Pull-Up Control (bit 2). • Pin Lock - GPIO pin may be locked to prevent any changes in the output value and/or the output characteristics. The lock is controlled by Lock (bit 3). It disables writes to the GPDO register bits, and to bits 0-3 of the GPCFG register (In- cluding the Lock bit itself). Once locked, it can be released by Hardware reset only. 5.2.2 Operation The value that is written to the GPDO register is driven to the pin if the output is enabled. Reading from the GPDO register returns its contents, regardless of the pin value or the port configuration. The GPDI register is a read-only register. Reading from the GPDI register returns the pin value, regardless of what is driving it (the port itself, configured as an output port, or the external device when the port is configured as an input port). Writing to this register is ignored. Activation of the GPIO port is controlled by an external device-specific configuration bit (or a combination of bits). When the port is inactive, access to GPDI and GPDO registers is disabled. However, there is no change in the port configuration and in the GPDO value, and hence there is no effect on the outputs of the pins. GPIO Device Pin Data Out Data In Enable Output Enable Output Internal Bus Lock Type Static Pull-Up Pull-Up Enable GPIO Pin Configuration (GPCFG) Register Push-Pull =1 Pull-Up Control Read Only Read/Write Bit 3 Bit 2 Bit 1 Bit 0 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |