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PC87382 Datasheet(PDF) 19 Page - National Semiconductor (TI) |
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PC87382 Datasheet(HTML) 19 Page - National Semiconductor (TI) |
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19 / 72 page ![]() 3.0 Device Architecture and Configuration (Continued) Revision 1.2 19 www.national.com Table 6. BADDR Strapping Options The Index register is an 8-bit read/write register located at the selected base address (Base+0). It is used as a pointer to the configuration register file, and holds the index of the configuration register that is currently accessible via the Data register. Reading the Index register returns the last value written to it (or the default of 00h after reset). The Data register is an 8-bit register (Base+1) used as a data path to any configuration register. Accessing the Data register actually accesses the configuration register that is currently pointed to by the Index register. 3.2.2 Banked Logical Device Registers Structure Each functional block is associated with a Logical Device Number (LDN). The configuration registers are grouped into banks, where each bank holds the standard configuration registers of the corresponding logical device. Table 7 shows the LDN val- ues of the PC87382 functional blocks. Any value not listed is reserved. Figure 4 shows the structure of the standard configuration register file. The LDN and PC87382 configuration registers are not banked and are accessed by the Index-Data register pair only, as described in Section 3.2.1. However, the device control and device configuration registers are duplicated over four banks for four logical devices. Therefore, accessing a specific register in a specific bank is performed by two-dimensional indexing, where the LDN register selects the bank (or logical device) and the Index register selects the register within the bank. Accessing the Data register while the Index register holds a value of 30h or higher physically accesses the logical device configuration registers currently pointed to by the Index reg- ister, within the logical device currently selected by the LDN register. Figure 4. Structure of Standard Configuration Register File Table 7. Logical Device Number (LDN) Assignments BADDR I/O Address Index Register Data Register 0 2Eh 2Fh 1 (default) 164Eh 164Fh LDN Functional Block 02h Infrared (IR) 03h Serial Port 1 (SP1) 07h General-Purpose I/O (GPIO) Ports 19h Docking LPC Switch 07h 20h 30h 60h 75h FFh Logical Device Number Register SuperI/O Configuration Registers Logical Device Control Register Standard Logical Device Special (Vendor-defined) Configuration Registers Banks 2Fh F0h Bank Select 63h 74h 70h 71h Configuration Registers (One per Logical Device) Logical Device |
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