PC87382 datasheet(53/72 Pages) NSC

53 / 72 page

7.0 Legacy Functional Blocks (Continued)

Revision 1.2

www.national.com

Table 32. Bank 2 Register Map

Offset

Mnemonic

Type

00h

BGD(L)

Baud Generator Divisor (Low Byte)

R/W

01h

BGD(H)

Baud Generator Divisor (High Byte)

R/W

02h

EXCR1

Extended Control1

R/W

03h

BSR

Bank Select

R/W

04h

EXCR2

Extended Control 2

R/W

05h

Reserved

06h

TXFLV

TX_FIFO Level

07h

RXFLV

RX_FIFO Level

Table 33. Bank 3 Register Map

Offset

Mnemonic

Type

00h

MRID

Module Identiﬁcation and Revision ID

01h

SH_LCR

Shadow of LCR

02h

SH_FCR

Shadow of FIFO Control

03h

BSR

Bank Select

R/W

04h-07h

Reserved

Table 34. Bank 4 Register Map

Offset

Mnemonic

Type

00h

TMR(L)

Timer (Low Byte)

R/W

01h

TMR(H)

Timer (High Byte)

R/W

02h

IRCR1

IR Control 1

R/W

03h

BSR

Bank Select

R/W

04h

TFRL(L)/

TFRCC(L)

Transmitter Frame Length (Low Byte) /

Transmitter Frame Current Count (Low Byte)

R/W

05h

TFRL(H)/

TFRCC(H)

Transmitter Frame Length (High Byte) /

Transmitter Frame Current Count (High Byte)

R/W

06h

RFRML(L)/

RFRCC(L)

Receiver Frame Maximum Length (Low Byte) /

Receiver Frame Current Count (Low Byte)

R/W

07h

RFRML(H)/

RFRCC(H)

Receiver Frame Maximum Length (High Byte) /

Receiver Frame Current Count (High Byte)

R/W

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