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CL-PD6722 Datasheet(PDF) 63 Page - Cirrus Logic |
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CL-PD6722 Datasheet(HTML) 63 Page - Cirrus Logic |
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63 / 128 page ![]() CL-PD6710/’22 ISA–to–PC-Card Host Adapters May 1997 63 PRELIMINARY DATA SHEET v3.1 EXTENSION REGISTERS 9.4 Chip Information Bits 4:1 — CL-PD67XX Revision Level This field identifies the revision of the controller. The initial value is ‘111’. Contact Cirrus Logic for more information on revision levels for the CL-PD6710 and CL-PD6722. Bit 5 — Dual/Single Socket* This bit specifies the number of sockets supported by the CL-PD67XX. Bits 7:6 — Cirrus Logic Host-Adapter Identification This field identifies a Cirrus Logic host-adapter device. After chip reset or doing an I/O write to this register, the first read of this register will return ‘11’. On the next read, this field will be ‘00’. This pattern of toggling data on subsequent reads can be used by software to determine presence of a Cirrus Logic host adapter in a system or to determine occurrence of a device reset. a The value for CL-PD6710 is ‘0’, and the value for CL-PD6722 is ‘1’. b This read-only value depends on the revision level of the CL-PD67XX chip. c The value for CL-PD6722 is ‘1’. The value for the CL-PD6710 is ‘0’. Register Name: Chip Information Index: 1Fh Register Per: chip Register Compatibility Type: ext. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Cirrus Logic Host-Adapter Identification Dual/Single Socket* CL-PD67XX Revision Level Reserved R:11 R:na R:nnnnb R:nc 0 Chip identified as a single-socket controller. 1 Chip identified as a dual-socket controller. 00 Second read after I/O write to this register. 11 First read after I/O write to this register. |
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