CL-PD6722 datasheet(18/128 Pages) CIRRUS

18 / 128 page

PRELIMINARY DATA SHEET v3.1

CL-PD6710/’22

ISA–to–PC-Card Host Adapters

May 1997

PIN INFORMATION

-WAIT †

Wait : This input indicates to the

CL-PD67XX that the current card

access cycle is to be extended until

this signal becomes inactive (high).

116

I-PU

2 or 3

–

-CD[2:1]

Card Detect: These inputs indicate to

the CL-PD67XX the presence of a

card in the socket. They are pulled

high internally in the chip.

70, 10

69, 10

132, 73

I-PU

–

-CE[2:1]

Card Enable: These outputs are

driven low by the CL-PD67XX during

card access cycles to control

byte/word card access. -CE1 enables

even-numbered address bytes and

-CE2 enables odd-numbered address

bytes. When conﬁgured for 8-bit cards,

only -CE1 will be active and A0 will be

set to ‘1’ for odd-byte accesses.

25, 22

22, 19

86, 83

O-TS

2 or 3

2 mA

RESET

Reset: This output will be high to reset

the card and low for normal operation. To

reduce power consumption of idle cards

and to prevent reset glitches to a card,

this signal is high-impedance unless a

card is fully seated in the socket and

card interface signals are enabled.

114

O-TS

2 or 3

2 mA

BVD2/

-SPKR/

-LED †

Battery Voltage Detect 2 / Speaker /

LED: In Memory Card Interface mode,

this input serves as the BVD2 or bat-

tery warning status input.

In I/O Card Interface mode, this input

can be conﬁgured as a card’s -SPKR

binary audio input. For disk-drive sup-

port, BVD2/-SPKR/-LED can also be

conﬁgured as a drive-status LED input.

In DMA mode, this pin can be pro-

grammed as the -DREQ input from a

DMA-capable PC Card.

122

I-PU

2 or 3

–

Table 2-2.

Socket Interface Pins (cont.)

Pin Name1

Description2

Pin Number

Qty

I/O

Pwr.

Drive

CL-PD6710

CL-PD6722

Socket A

Socket B

1 To differentiate the sockets, all CL-PD6722 pin names have either A_ or B_ prepended to the pin names indicated. For

example, A_A[25:0] and B_A[25:0] are the independent address buses to the sockets.

2 When a socket is configured as an ATA drive interface, socket interface pin functions change. See Table 11-1 on page 75.

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