CL-PD6722 datasheet(95/128 Pages) CIRRUS

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CL-PD6722 Datasheet(PDF) 95 Page - Cirrus Logic

95 / 128 page

CL-PD6710/’22

ISA–to–PC-Card Host Adapters

May 1997

PRELIMINARY DATA SHEET v3.1

ELECTRICAL SPECIFICATIONS

15.3.3

System Interrupt Timing

Figure 15-3. Pulse Mode Interrupt Timing

Table 15-9. Pulse Mode Interrupt Timing

Symbol

Parameter

MIN

MAX

t 1

IRQ[XX] low or high

2 CLK – 10 ns

2 CLK + 10 ns

IRQ[XX]

High-Z

High-Z = high impedance

NOTE: Each time indicated is 2 clock periods of the CLK input to the CL-PD67XX, independent of setting of the

Bypass Frequency Synthesizer bit.

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