CL-PD6722 datasheet(69/128 Pages) CIRRUS

69 / 128 page

CL-PD6710/’22

ISA–to–PC-Card Host Adapters

May 1997

PRELIMINARY DATA SHEET v3.1

EXTENSION REGISTERS

9.7.4

External Data (CL-PD6722 only, Socket A, Index 2Fh)

Bits 7:0 — External Data

This register is updated and accessed according to the setting of bits 3 and 4 of the Socket A

Extension Control 2 register (Index 2Fh, Extended Index 0Bh).

NOTE: For software compatibility of external data access accross the Cirrus Logic PC Card host adapter product

line, the Socket A External Data register should only be used as a

write port and not as a read port. Also

for compatibility, only the lower nibble of External Data should be accessed and the upper nibble should be

ignored.

Refer to Chapter 12 for more information on the use of the External Data register.

Index: 2Fh only

Extended Index: 0Ah

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

External Data

RW:0

Table 9-2.

Functions of Socket A External Data Register

Socket A Extension Control 2

Function of Socket A External Data Register

Bit 4: GPSTB

on IOW*

Bit 3: GPSTB

on IOR*

Scratchpad

External read port: A_GPSTB is a read buffer enable for external data on

SD[15:8]

External write port: A_GPSTB is a write latch enable for SD[15:8] to get

latched to an external register. Reads of Socket A External Data register pro-

duce the value written to the latch.

Reserved

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