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Revision 1.0

1.2

BUFFER TYPES AND SIGNAL/PIN DIRECTORY

The signal DC characteristics of the pins described in Section 1.4 are denoted by buffer type symbols, which are defined in

Table 1. The pin multiplexing information refers to two different types of multiplexing:

• Multiplexed, denoted by a slash (/) between pins in the diagram in Section 1.1. Pins are shared between two different

functions. Each function is associated with different board connectivity. Normally, the function selection is determined

by the board design and cannot be changed dynamically. The multiplexing options must be configured by the BIOS

on power-up to comply with the board implementation.

• Multiple Mode, denoted by an underscore (_) between pins in the diagram in Section 1.1. Pins have two or more

modes of operation within the same function. These modes are associated with the same external (board)

connectivity. Mode selection can be controlled by the device driver through the registers of the functional block and

does not require a special BIOS setup upon power-up. These pins are not considered multiplexed pins from the

ServerI/O configuration perspective. The mode selection method (registers and bits), as well as the signal specifica-

tion in each mode, are described within the functional description of the relevant functional block.

Table 1. Buffer Types

Symbol

Description

Input, CMOS compatible, with Schmitt Trigger

Input, from crystal oscillator (not characterized)

Input, PCI 3.3V

Input, SMBus compatible

Input, TTL compatible

Input, TTL compatible, with Schmitt Trigger

Input, power, resistor protected (not characterized)

Output, push-pull output buffer capable of sourcing p mA and sinking n mA

Output, open-drain output buffer capable of sinking n mA

Output, to crystal oscillator (not characterized)

Output, PCI 3.3V

Output, open-drain, PCI 3.3V

PWR

Power pin

GND

Ground pin