PC87427 datasheet(15/46 Pages) NSC

15 / 46 page

1.0 Signal/Pin Connection and Description (Continued)

Revision 1.0

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1.4.10 System Wake-Up Control (SWC)

Signal

Pin(s)

I/O Buffer Type Power Well

Description

GPIOE17-16

8-7

INTS

VSB

Wake-up Inputs. Generate a wake-up event or an interrupt.

These pins have programmable debounce protection.

GPIOE15-10

103-107,

109

GPIOE11-10

2-1

INTS

VSB

GPIOE40-47

21-22, 35,

49, 38,

51, 20, 32

INTS

VSB

RI1

RI2

101

102

IINTS

VSB

Ring Indicator Wake-up. When low, generates a wake-up

event or an interrupt, indicating that a telephone ring signal was

received by the modem. When RI functionality is not required,

an internal pull-up resistor allows this pin to be left floating.

KBCLK

125

INTS

VSB

Keyboard Clock Wake-up. Generates a wake-up event or an

interrupt, indicating a change in the keyboard clock signal.

KBDAT

126

INTS

VSB

Keyboard Data Wake-up. Generates a wake-up event or an

interrupt, indicating a change in the keyboard data signal.

MCLK

127

INTS

VSB

Mouse Clock Wake-up. Generates a wake-up event or an

interrupt, indicating a change in the mouse clock signal.

MDAT

128

INTS

VSB

Mouse Data Wake-up. Generates a wake-up event or an

interrupt, indicating a change in the mouse data signal.

PWBTIN

INTS

VSB

Power Button In. Active (low) level indicates a user request

to turn the power on or off. This pin has debounce protection.

PWBTOUT

OD6

VSB

Power Button Out. Output for the chip-set Power Button input.

SLBTIN

INTS

VSB

Sleep Button In. Active (low) level indicates a user request to

enter or exit Sleep mode. This pin has debounce protection.

SLPS3,

SLPS5

IINTS

VSB

Sleep State 3 to 5. Active (low) level indicates the system is

in one of the sleep states S3, S4 or S5. These signals are

generated by an external ACPI controller.

Pins

SLPS3 SLPS5 Functionality

Working state (S0) or sleep states S1 or S2

Sleep state S3

Sleep states S4 or S5

Illegal combination

SIOSCI

OD6

VSB

System Control Interrupt. Active (low) level indicates that a

wake-up event occurred, causing the system to exit its current

sleep state.

SIOSMI

OD6

VSB

System Management Interrupt. Active (low) level indicates

that an SMI occurred.

ONCTL

OD6

VSB

Power Supply On/Off Control. Active level (low) indicates

that the power should be turned on. An external pull-up

resistor is required

LED1, LED2

50, 51

O14/14

VSB

LED Drives. These outputs can be connected directly to LED

devices. They can be conﬁgured, with programmable blink

rate for all LEDs, as one dual-colored LED or two single-

colored LEDs.

CHASSIS

INCS

VPP

1. Internal VPP is based on VSB and VBAT.

Chassis Intrusion Input. Any change of this pin sets the

intrusion detection. For correct operation, this pin must be tied

to VSS when it is not used.

PC87427 Datasheet(PDF) 15 Page - National Semiconductor (TI)

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