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PC87427 Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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PC87427 Datasheet(HTML) 11 Page - National Semiconductor (TI) |
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11 / 46 page ![]() 1.0 Signal/Pin Connection and Description (Continued) Revision 1.0 11 www.national.com 1.4.5 Fan Monitor & Control (FMC) DTR1_ BOUT1 100 O O4/8 VDD Data Terminal Ready. When low, indicates to the data transfer device, e.g., modem, that the UART is ready to establish a communications link. After a system reset, these pins provide the DTR function and set these signals to inactive high. Loopback operation holds them inactive. Baud Output. Provides the associated serial channel baud rate generator output signal if Test mode is selected, i.e., bit 7 of EXCR1 register is set. DTR2_ BOUT2 DTRM_ BOUTM 108 88 VSB RI1 101 I INTS VDD Ring Indicator. When low, indicates that a telephone ring signal was received by the modem. These pins are monitored during VDD power-off for wake-up event detection. RI2 102 VSB RTS1 97 O O3/6 VDD Request to Send. When low, indicates to the modem or other data transfer device that the corresponding UART is ready to exchange data. A system reset sets these signals to inactive high, and loopback operation holds them inactive. RTS2 RTSM 105 91 VSB SIN1 96 I INTS VDD Serial Input. Receives composite serial data from the communications link (peripheral device, modem or other data transfer device). SIN2 SINM 104 90 VSB SOUT1 98 O O3/6 VDD Serial Output. Sends composite serial data to the communications link (peripheral device, modem or other data transfer device). These signals are set active high after a system reset. SOUT2 SOUTM 106 89 VSB 1. DCDM is an output signal due to its role in an exchange connection with an external BMC. Signal Pin(s) I/O Buffer Type Power Well Description FANIN0-7 66, 81, 77, 76, 75, 83, 36, 9 IINTS VDD Fan Inputs. Used to feed the fan’s tachometer pulse to the Fan Speed Monitor. FANOUT0 78 O OD12,O6/12 VDD Fan Outputs. Pulse Width Modulation (PWM) signals, used to control the speed of cooling fans by controlling the voltage supplied to the fans motors. FANOUT1 7 53 FANOUT2 8 33 FANOUT3 67 Signal Pin(s) I/O Buffer Type Power Well Description |
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