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PM6344 Datasheet(PDF) 196 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 196 Page - PMC-Sierra, Inc |
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196 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 183 Figure 14 - Receive composite multiframe output (BRXSMFP=1 and BRXCMFP=1) 12 345 6 7 8 AB C D 12 345 6 7 8 Timeslot 31 Timeslot 0 BRCLK BRFPO[x] BRPCM[x] BRSIG[x] BRFPI Undefined Undefined 12 345 678 AB C D C1 2 345 678 Timeslot 31 Timeslot 0 Undefined Undefined If ROHM=0, BRXSMFP=1 and BRXCMFP=1, the BRFPO[x] signal becomes high on the falling BRCLK edge marking the beginning of bit 1 of frame 1 of every 16 frame signaling multiframe and returns low on the falling BRCLK edge marking the end of bit 1 of frame 1 of every 16 frame CRC multiframe. Figure 15 - Receive overhead output (ROHM=1) 12 345 6 7 8 AB C D 1 234 56 781 234 56 78 AB C D 12 3 456 781 2 3 456 78 ABC D Timeslot 31 Timeslot 0 Timeslot 1 Timeslot 16 Timeslot 17 BRCLK BRFPO[x] BRPCM[x] BRSIG[x] BRFPI Undefined Undefined Undefined If the ROHM bit is logic 1, the BRFPO[x] signal marks the overhead by becoming high during timeslots 0 and 16, as in Figure 15. |
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