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PM6344 Datasheet(PDF) 202 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 202 Page - PMC-Sierra, Inc |
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202 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 189 The Transmit Backplane is configured to expect bit interleaved 16.384MHz data. PCM and signaling for all four receivers are presented on a single pin, MTD. The superscripts represent the index of the particular E1 stream. The Transmit Backplane Options register for each receiver is programmed with BRX2RAIL=0. For input frame pulses shown in the preceding figure, BTXMFP=0. The MENB input is low. Note that in normal operation, where the TRAN block inserts all the TS0 overhead, the PCM inputs on MTD are "don't cares" for TS0 and TS16. The preceding diagram shows the TS0 bits for timing reference purposes only. If the backplane transmit parity is enabled, the International bit (Si bit) position of the PCM data stream in each frame should contain the PCM parity bit. The parity bit of each SIG stream follows the parity bit of the PCM data stream. In the case where MENB=0 and BTXMFP=1, the input MTFP marks the start of the signaling multiframe and the start of the CRC multiframe as described in the description of the Transmit Backplane Options register. The waveforms for this case are shown in Fig. 21. |
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