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PM6344 Datasheet(PDF) 143 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 143 Page - PMC-Sierra, Inc |
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143 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 130 * The A-Law digital milliwatt pattern used is that defined in Recommendation G.711 for A-law: Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 00 1 1 0 1 0 0 00 1 0 0 0 0 1 00 1 0 0 0 0 1 00 1 1 0 1 0 0 10 1 1 0 1 0 0 10 1 0 0 0 0 1 10 1 0 0 0 0 1 10 1 1 0 1 0 0 * The µ-Law digital milliwatt pattern used is that defined in Recommendation G.711 for µ-law: Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 00 0 1 1 1 1 0 00 0 0 1 0 1 1 00 0 0 1 0 1 1 00 0 1 1 1 1 0 10 0 1 1 1 1 0 10 0 0 1 0 1 1 10 0 0 1 0 1 1 10 0 1 1 1 1 0 SIGSRC: The SIGSRC bit is valid only if Channel Associated Signaling (CAS) is selected in the TRAN Configuration Register; otherwise, it is ignored. When valid, the SIGSRC bit selects the source of the timeslot signaling bits: if SIGSRC is a logic 0, the signaling bits are taken from the incoming BTSIG stream in the format specified by the SIGEN and DLEN bits in the TRAN Configuration Register; if SIGSRC is a logic 1, the signaling bits are taken from the A',B',C', and D' bit . |
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